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GAL16V8

Part Number	GAL16V8
Manufacturer	Lattice Semiconductor
Description	High Performance E2CMOS PLD Generic Array Logic
Published	Mar 23, 2005
Detailed Description	GAL16V8 High Performance E2CMOS PLD Generic Array Logic™ Features • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.5 ns Maximum...
Datasheet	GAL16V8 PDF File

Overview

GAL16V8 High Performance E2CMOS PLD Generic Array Logic™ Features • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.
5 ns Maximum Propagation Delay — Fmax = 250 MHz — 3.
0 ns Maximum from Clock Input to Data Output — UltraMOS® Advanced CMOS Technology • 50% to 75% REDUCTION IN POWER FROM BIPOLAR — 75mA Typ Icc on Low Power Device — 45mA Typ Icc on Quarter Power Device • ACTIVE PULL-UPS ON ALL PINS • E2 CELL TECHNOLOGY — Reconfigurable Logic — Reprogrammable Cells — 100% Tested/100% Yields — High Speed Electrical Erasure (<100ms) — 20 Year Data Retention • EIGHT OUTPUT LOGIC MACROCELLS — Maximum Flexibility for Complex Logic Designs — Programmable Output Polarity — Also Emulates 20-pin PAL® Devices with Full Function/Fuse Map/Parametric Compatibility • PRELOAD AND POWER-ON RESET OF ALL REGISTERS — 100% Functional Testability • APPLICATIONS INCLUDE: — DMA Control — State Machine Control — High Speed Graphics Processing — Standard Logic Speed Upgrade • ELECTRONIC SIGNATURE FOR IDENTIFICATION I 8 I OLMC OE Functional Block Diagram I/CLK CLK 8 I 8 I OLMC I/O/Q OLMC I/O/Q PROGRAMMABLE AND-ARRAY (64 X 32) 8 OLMC I/O/Q I 8 OLMC I/O/Q I 8 OLMC I/O/Q I 8 OLMC I/O/Q I 8 OLMC I/O/Q I/O/Q I/OE Pin Configuration PLCC I I 2 I I I I I 8 14 9 I GND 11 I/OE I/O/Q 13 I/O/Q 6 4 I/CLK Vcc 20 18 I/O/Q I/O/Q 16 I/O/Q I/O/Q I/O/Q I/O/Q Description The GAL16V8, at 3.
5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market.
High speed erase times (<100ms) allow the devices to be reprogrammed quickly and efficiently.
The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user.
An important subset of the many architecture configurations possible with the GAL16V8 are the PAL architectures listed in the table of the macrocell description section.
GAL16V8 devi...

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