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87332I-01

IDT
Part Number 87332I-01
Manufacturer IDT
Description ECL/LVPECL Clock Generator
Published Apr 28, 2015
Detailed Description ÷2, Differential-to-2.5V/3.3V ECL/LVPECL Clock Generator 87332I-01 DATA SHEET GENERAL DESCRIPTION The 87332I-01 is a h...
Datasheet PDF File 87332I-01 PDF File

87332I-01
87332I-01

Overview
÷2, Differential-to-2.
5V/3.
3V ECL/LVPECL Clock Generator 87332I-01 DATA SHEET GENERAL DESCRIPTION The 87332I-01 is a high performance ÷2 Differential-to-2.
5V/3.
3V ECL/LVPECL Clock Generator.
The CLK, nCLK pair can accept most standard differential input levels The 87332I-01 is characterized to operate from either a 2.
5V or a 3.
3V power supply.
Guaranteed output and part-to-part skew characteristics make the 87332I-01 ideal for those clock distribution applications demanding well defined performance and repeatability.
FEATURES • One ÷2 differential 2.
5V/3.
3V LVPECL / ECL output • One CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 500MHz • Maximum input frequency: 1GHz • Translates any single ended input signal to 3.
3V LVPECL levels with resistor bias on nCLK input • Part-to-part skew: 400ps (maximum) • Propagation delay: 1.
6ns (maximum) • LVPECL mode operating voltage supply range: VCC = 2.
375V to 3.
8V, VEE = 0V • ECL mode operating voltage supply range: VCC = 0V, VEE = -2.
375V to -3.
8V • -40°C to 85°C ambient operating temperature • Available in lead-free (RoHS 6) package BLOCK DIAGRAM CLK nCLK ÷2 Q nQ MR PIN ASSIGNMENT MR CLK nCLK nc 1 2 3 4 8 Vcc 7Q 6 nQ 5 VEE 87332I-01 8-Lead SOIC 3.
90mm x 4.
90mm x 1.
37mm package body M Package Top View 87332AMI-01 REVISION C 2/12/15 1 ©2015 Integrated Device Technology, Inc.
87332AMI-01 DATA SHEET TABLE 1.
PIN DESCRIPTIONS Number Name Type Description Master reset.
When LOW, outputs are enabled.
When HIGH, 1 MR Input Pulldown divider is reset forcing Q output LOW and nQ output HIGH.
LVCMOS / LVTTL interface level.
2 CLK Input Pulldown Non-inverting differential clock input.
3 nCLK Input Pullup Inverting differential clock input.
4 nc Unused No connect.
5 VEE Power 6, 7 Q, nQ Output Negative supply pin.
Differential output pair.
LVPECL interface levels.
8 VCC Power Positive supply pin.
NOTE: ...


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