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A3R56E40ABF

Zentel
Part Number A3R56E40ABF
Manufacturer Zentel
Description 256Mb DDRII Synchronous DRAM
Published Sep 1, 2015
Detailed Description A3R56E40ABF 256Mb DDRII Synchronous DRAM 256Mb DDRII SDRAM Specification A3R56E40ABF Zentel Electronics Corp. Revision...
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A3R56E40ABF
A3R56E40ABF

Overview
A3R56E40ABF 256Mb DDRII Synchronous DRAM 256Mb DDRII SDRAM Specification A3R56E40ABF Zentel Electronics Corp.
Revision 1.
2 Dec.
, 2012 A3R56E40ABF 256Mb DDRII Synchronous DRAM Specifications • Density: 256M bits • Organization ⎯ 4M words × 16 bits × 4 banks (A3R56E40ABF) • Package ⎯ 84-ball FBGA(μBGA) (A3R56E40ABF) ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 1.
8V ± 0.
1V • Data rate: 1066Mbps/800Mbps(max.
) • 1KB page size (A3R56E40ABF) ⎯ Row address: A0 to A12 ⎯ Column address: A0 to A8 • Four internal banks for concurrent operation • Interface: SSTL_18 • Burst lengths (BL): 4, 8 • Burst type (BT): ⎯ Sequential (4, 8) ⎯ Interleave (4, 8) • /CAS Latency (CL): 3, 4, 5, 6, 7 • Precharge: auto precharge option for each burst access • Driver strength: normal/weak • Refresh: auto-refresh, self-refresh • Refresh cycles: 8192 cycles/64ms ⎯ Average refresh period 7.
8μs at 0°C ≤ TC ≤ +85°C 3.
9μs at +85°C < TC ≤ +95°C • Operating case temperature range ⎯ TC = 0°C to +95°C Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • DQS is edge-aligned with data for READs; centeraligned with data for WRITEs • Differential clock inputs (CK and /CK) • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Data mask (DM) for write data • Posted /CAS by programmable additive latency for better command and data bus efficiency • On-Die-Termination for better signal quality • /DQS can be disabled for single-ended Data Strobe operation • Off-Chip Driver (OCD) impedance adjustment is not supported Zentel Electronics Corporation reserve the right to change products or specification without notice.
Revision 1.
2 Page 1 / 71 Dec.
, 2012 Ordering ...


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