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MC68HC908GP32

Freescale Semiconductor
Part Number MC68HC908GP32
Manufacturer Freescale Semiconductor
Description Microcontrollers
Published Dec 20, 2015
Detailed Description MC68HC908GP32 Data Sheet M68HC08 Microcontrollers MC68HC908GP32 Rev. 10 1/2008 freescale.com MC68HC908GP32 Data Sheet T...
Datasheet PDF File MC68HC908GP32 PDF File

MC68HC908GP32
MC68HC908GP32

Overview
MC68HC908GP32 Data Sheet M68HC08 Microcontrollers MC68HC908GP32 Rev.
10 1/2008 freescale.
com MC68HC908GP32 Data Sheet To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current.
Your printed copy may be an earlier revision.
To verify you have the latest information available, refer to: http://freescale.
com The following revision history table summarizes changes contained in this document.
For your convenience, the page number designators have been linked to the appropriate location.
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
This product incorporates SuperFlash® technology licensed from SST.
© Freescale Semiconductor, Inc.
, 2001, 2006, 2008.
All rights reserved.
Freescale Semiconductor MC68HC908GP32 Data Sheet, Rev.
10 3 Revision History Revision History Date July, 2001 August, 2002 August, 2005 March, 2006 April, 2007 June, 2007 January, 2008 Revision Level 5 6 Description In Table 15-1, second cell in "Comment" column, corrected PTC to PTC1.
In Figure 21-2, Timebase control register, bit 0 is a reserved bit.
Updated crystal oscillator component values in 23.
17.
1 CGM Component Specifications.
Added appendix A: MC68HC08GP32 — ROM part.
Section 22.
Timer Interface Module (TIM) — Timer discrepancies corrected throughout this section.
Section 24.
Mechanical Specifications — Replaced incorrect 44-pin QFP drawing, case 824E to case 824A.
6.
1 Updated to meet Freescale identity guidelines.
3.
5 Clock Generator Module (CGM) — Updated description to remove erroneous information.
7 19.
16.
1 CGM Component Specifications — Updated to reflect correct values.
8 12.
5.
1 Port D Data Register — Corrected the description of the slave select (SS) bit.
9 Never released.
Typos.
Deleted the Resets and Interrupts Chapter because it was redundant Chapter 2 Memory — Removed DMA bit references Chapter 2 Memory — Integrated RAM and FLASH sections 2.
6 FLASH Memory — Updated FLASH era...


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