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MB9BF105RA

Fujitsu
Part Number MB9BF105RA
Manufacturer Fujitsu
Description 32-bit ARM Cortex-M3 based Microcontroller
Published Jan 3, 2016
Detailed Description FUJITSU SEMICONDUCTOR DATA SHEET DS706-00020-1v0-E 32-bit ARMTM CortexTM-M3 based Microcontroller MB9B100A Series MB9...
Datasheet PDF File MB9BF105RA PDF File

MB9BF105RA
MB9BF105RA

Overview
FUJITSU SEMICONDUCTOR DATA SHEET DS706-00020-1v0-E 32-bit ARMTM CortexTM-M3 based Microcontroller MB9B100A Series MB9BF102NA/RA, F104NA/RA, F105NA/RA, F106NA/RA DESCRIPTION This series are a highly integrated 32-bit microcontroller that target for high-performance and cost-sensitive embedded control applications.
This series are based on the ARM Cortex-M3 Processor and on-chip Flash memory and SRAM, and peripheral functions, including Motor Control Timers, ADCs and Communication Interfaces (UART, CSIO, I2C, LIN).
The products which are described in this data sheet are placed into TYPE0 product categories in "FM3FAMILY MB9Axxx/MB9Bxxx SERIES PERIPHERAL MANUAL".
Note: ARM and Cortex are the trademarks of ARM Limited in the EU and other countries.
Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.
8 MB9B100A Series FEATURES 32-bit ARM Cortex-M3 Core ・Processor version: r2p0 ・Up to 80MHz Frequency Operation ・Memory Protection Unit (MPU): improve the reliability of an embedded system ・Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels ・24-bit System timer (Sys Tick): System timer for OS task management On-chip Memories [Flash memory] ・Up to 512 Kbyte ・Read cycle: 0wait-cycle@up to 60MHz, 2wait-cycle* above *: Instruction pre-fetch buffer is included.
So when CPU access continuously, it becomes 0wait-cycle ・Security function for code protection [SRAM] This series contain a total of up to 64Kbyte on-chip SRAM memories.
This is composed of two independent SRAM can process simultaneously.
SRAM0 is connected to I-Code bus and D-Code bus of Cortex-M3 core.
SRAM1 is connected to System bus.
・SRAM0: Up to 32 Kbyte ・SRAM1: Up to 32 Kbyte External Bus Interface ・Supports SRAM, NOR& NAND Flash device ・Up to 8 chip selects ・8/16-bit Data width ・Up to 25-bit Address bit Multi-function Serial Interface (Max.
8channels) ・4 channels with 16-byte FIFO (ch.
4-ch.
7), 4 channels w...


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