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SAMC21G15A

Atmel
Part Number SAMC21G15A
Manufacturer Atmel
Description SMART ARM-Based Microcontrollers
Published Jan 8, 2016
Detailed Description SMART ARM-Based Microcontrollers SAM C21E / SAM C21G / SAM C21J DATASHEET PRELIMINARY Introduction The Atmel® | SMART™ S...
Datasheet PDF File SAMC21G15A PDF File

SAMC21G15A
SAMC21G15A


Overview
SMART ARM-Based Microcontrollers SAM C21E / SAM C21G / SAM C21J DATASHEET PRELIMINARY Introduction The Atmel® | SMART™ SAM C21 is a series of microcontrollers optimized for industrial automation, appliances and other 5V applications using the 32-bit ARM® Cortex®-M0+ processor, ranging from 32- to 64-pins with up to 256KB Flash and 32KB of SRAM and operate at a maximum frequency of 48MHz and reach 2.
46 CoreMark®/MHz.
The SAM C21 devices are designed for simple and intuitive migration with identical peripheral modules, hex compatible code, identical linear address map and pin compatible migration paths between all devices in the product series.
All devices include intelligent and flexible peripherals, Atmel Event System for inter-peripheral signaling, and support for capacitive touch button, slider and wheel user interfaces.
SAM C21 devices are pin compatible to the SAM D family of general purpose microcontrollers.
Features • Processor – ARM Cortex-M0+ CPU running at up to 48MHz • Single-cycle hardware multiplier • Micro Trace Buffer • Memory Protection Unit (MPU) • Memories – 32/64/128/256KB in-system self-programmable Flash – 1/2/4/8KB independent self-programmable Flash for EEPROM emulation – 4/8/16/32KB SRAM Main Memory • System – Power-on reset (POR) and brown-out detection (BOD) – Internal and external clock options with 48MHz to 96MHz Fractional Digital Phase Locked Loop (FDPLL96M) – External Interrupt Controller (EIC) – 16 external interrupts – One non-maskable interrupt Atmel-42365E-SAM C21_Datasheet_Preliminary-12/2015 – Two-pin Serial Wire Debug (SWD) programming, test and debugging interface • Low Power – Idle, standby, and off sleep modes – SleepWalking peripherals • Peripherals – Hardware Divide and Square Root Accelerator (DIVAS) – 12-channel Direct Memory Access Controller (DMAC) – 12-channel Event System – Up to five 16-bit Timer/Counters (TC), configurable as either: • One 16-bit TC with compare/capture channels • One 8-bit TC with compare/capture c...



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