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ANX3112

Analogix
Part Number ANX3112
Manufacturer Analogix
Description Low Power DisplayPort to LVDS Converter
Published Jan 9, 2016
Detailed Description Product Brief ANX3112 Low Power DisplayPort™ to LVDS Converter with Single Channel 18-bpp Output Features  All softwa...
Datasheet PDF File ANX3112 PDF File

ANX3112
ANX3112

Overview
Product Brief ANX3112 Low Power DisplayPort™ to LVDS Converter with Single Channel 18-bpp Output Features  All software compatible with AMD platform driver/BIOS stacks - Designed and fully tested with extensive APU-based platform test requirements - No additional firmware and EEPROM to manage LCD dimming and video timing control  Two package options available to support for new and running-change platforms (36 & 64QFN)  Super low power single channel 18-bit per pixel LVDS output - Single channel: Up to 120 MHz pixel clock - 50% power reduction: <100mW@65MHz - Up to WSXGA+ 1680 x 1650 @ 60Hz, 18bpp  Smart panel dimming control state machine compatible with Travis-based family products  Programmable directly through AUX or local I2C slave port  Compliant with VESA DisplayPort™ 1.
1a - 1-lane with 1.
62 / 2.
7Gbps data rate support - AUX channel link up to 1Mbps bandwidth - DPCD registers accessible by the AUX channel and I2C Slave Interface - Spread Spectrum Clock (SSC) support for improved EMI performance  eDP content protection with Chip ID, OUI support  Programmable LVDS swing, pre-emphasis, channel swap, and polarity inversion  Programmable LVDS Output Spread Spectrum Clocking Generation (SSCG) with amplitude +/1.
75% for EMI reduction  Optional on-chip microcontroller with 512-Byte program space  Recommend 3.
3VIO and 1.
2VCORE power supply for APU platform  Optionally support 2.
5VIO/1.
2VCORE application system  Package - 36-pin QFN (6x6) - RoHS compliant and Halogen free ANX3112 has small 36 QFN package for AMD APUbased PC platform with Analogix’s low power DisplayPort™ receiver offering 18 bit-per-pixel single channel LVDS output.
It provides a high quality interface solution between AMD’s APU processor and LVDS panels.
Please refer to the part ordering and related products information.
Mainlink Lane 0 DisplayPort™ Receiver Data Decoder Video processing & formatting LVDS Tx LVDS Output HPD AUX CH Rev 1.
0 Hot -Plug Detect Aux Device Configurat...


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