DatasheetsPDF.com

MC100EP196A

Part Number	MC100EP196A
Manufacturer	ON Semiconductor
Description	3.3 V ECL Programmable Delay Chip
Published	Jan 16, 2016
Detailed Description	MC100EP196A 3.3 V ECL Programmable Delay Chip With FTUNE The MC100EP196A is a Programmable Delay Chip (PDC) designed ...
Datasheet	MC100EP196A PDF File

Overview

MC100EP196A 3.
3 V ECL Programmable Delay Chip With FTUNE The MC100EP196A is a Programmable Delay Chip (PDC) designed primarily for clock deskewing and timing adjustment.
It provides variable delay of a differential NECL/PECL input transition.
It has similar architecture to the EP195 with the added feature of further tunability in delay using the FTUNE pin.
The FTUNE input takes an http://onsemi.
com analog voltage from VCC to VEE to fine tune the output delay from 0 to 60 ps.
MARKING The delay section consists of a programmable matrix of gates and DIAGRAM* multiplexers as shown in the logic diagram, Figure 2.
The delay increment of the EP196A has a digitally selectable resolution ...

Similar Datasheet

MC100EP195 3.3V ECL Programmable Delay Chip - ON Semiconductor
MC100EP195B 3.3V ECL Programmable Delay Chip - ON Semiconductor
MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE - ON Semiconductor
MC100EP196A 3.3 V ECL Programmable Delay Chip - ON Semiconductor
MC100EP196B 3.3 V ECL Programmable Delay Chip - ON Semiconductor

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)