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ICS83905I

Part Number	ICS83905I
Manufacturer	Integrated Device Technology
Description	1:6 CRYSTAL INTERFACETOLVCMOS / LVTTL FANOUT BUFFER
Published	Jan 27, 2016
Detailed Description	DATA SHEET LOW SKEW, 1IC:n6itrecguCriattRedYSTAL INTERFACETOLVCMOS / LSyVstTemTs,LIncF. ANOUT BUFFER ICS83I9C0S58I3905...
Datasheet	ICS83905I PDF File

Overview

DATA SHEET LOW SKEW, 1IC:n6itrecguCriattRedYSTAL INTERFACETOLVCMOS / LSyVstTemTs,LIncF.
ANOUT BUFFER ICS83I9C0S58I3905I LOW SKEW, 1:6 CRYSTAL INTERFACE-TOLVCMOS / LVTTL FANOUT BUFFER GENERAL DESCRIPTION ICS The ICS83905I is a low skew, 1-to-6 LVCMOS / LVTTL Fanout Buffer and a member of the HiPerClockS™ HiPerClockS™family of High Performance Clock Solutions from ICS.
The low impedance LVCMOS/LVTTL outputs are designed to drive 50W series or parallel terminated transmission lines.
The ef- fective fanout can be increased from 6 to 12 by utilizing the ability of the outputs to drive two series terminated lines.
The ICS83905I is characterized at full 3.
3V, 2.
5V, and 1.
8V, mixed 3.
3V/2.
5V, 3.
3V/1.
8V and 2.
5V/1.
8V output operating supply mode.
Guaranteed output and part-to-part skew characteristics along with the 1.
8V output capabilities makes the ICS83905I ideal for high performance, single ended applications that also require a limited output voltage.
FEATURES • 6 LVCMOS / LVTTL outputs • Outputs able to drive 12 series terminated lines • Crystal oscillator interface • Crystal input frequency range: 10MHz to 40MHz • Output skew: 80ps (maximum) • RMS phase jitter @ 25MHz, (100Hz - 1MHz): 0.
26ps (typical) (V = V = 2.
5V) DD DDO Phase noise: Offset Noise Power 100Hz .
.
.
.
-129.
7 dBc/Hz 1kHz .
.
.
.
-144.
4 dBc/Hz 10kHz .
.
.
.
-147.
3 dBc/Hz 100kHz .
.
.
.
-157.
3 dBc/Hz • 5V tolerant enable inputs • Synchronous output enables • Operating power supply modes: Full 3.
3V, 2.
5V and 1.
8V, mixed 3.
3V core/2.
5V output operating supply, mixed 3.
3V core/1.
8V output operating supply, mixed 2.
5V core/1.
8V output operating supply • -40°C to 85°C ambient operating temperature • Lead-Free package fully RoHS compliant BLOCK DIAGRAM XTAL_IN XTAL_OUT ENABLE 1 ENABLE 2 SYNCHRONIZE SYNCHRONIZE PIN ASSIGNMENT BCLK0 BCLK1 BCLK2 BCLK3 BCLK4 XTAL_OUT ENABLE 2 GND BCLK0 VDDo BCLK1 GND BCLK2 1 2 3 4 5 6 7 8 16 XTAL_IN 15 ENABLE 1 14 B...

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