DatasheetsPDF.com

ASM2I9940L

Part Number	ASM2I9940L
Manufacturer	Alliance Semiconductor
Description	Low Voltage 1:18 Clock Distribution Chip
Published	Feb 6, 2016
Detailed Description	June 2005 ASM2I9940L rev 1.0 Low Voltage 1:18 Clock Distribution Chip Features LVPECL or LVCMOS Clock Input 2.5V...
Datasheet	ASM2I9940L PDF File

Overview

June 2005 ASM2I9940L rev 1.
0 Low Voltage 1:18 Clock Distribution Chip Features LVPECL or LVCMOS Clock Input 2.
5V LVCMOS Outputs for Pentium II Microprocessor Support* 150pS Maximum Output-to-Output Skew Maximum Output Frequency of 250MHz 32 Lead LQFP & TQFP Packaging Dual or Single Supply Device: Dual VCC Supply Voltage, 3.
3V Core and 2.
5V Output Single 3.
3V VCC Supply Voltage for 3.
3V Outputs Single 2.
5V VCC Supply Voltage for 2.
5V I/O Pin and Function compatible to MPC940L, MPC9109, CY29940 and CY29940-1 Functional Description The ASM2I9940L is a 1:18 low Voltage Clock distribution chip with 2.
5V or 3.
3V LVCMOS output capabilities.
The device features the capability to select either a differential LVPECL or LVCMOS compatible input.
The 18 outputs are 2.
5V or 3.
3V LVCMOS compatible and feature the drive strength to drive 50Ω series or parallel terminated transmission lines.
With output-to-output skews of 150pS, the ASM2I9940L is ideal as a clock distribution chip for the most demanding of Synchronous systems.
The 2.
5V outputs also make the device ideal for supplying clocks for a high performance microprocessor based design.
With low output impedance (≈20Ω), in both the HIGH and LOW logic states, the output buffers of the ASM2I9940L are ideal for driving series terminated transmission lines.
With a 20Ω output impedance the ASM2I9940L has the capability of driving two series terminated lines from each output.
This gives the device an effective fanout of 1:36.
The differential LVPECL inputs of the ASM2I9940L allow the device to interface directly with a LVPECL fanout buffer to build very wide clock fanout trees or to couple to a high frequency clock source.
The LVCMOS input provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies.
In addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock.
A logic HIGH on the L...

Similar Datasheet

ASM2I9940L Low Voltage 1:18 Clock Distribution Chip - ON Semiconductor
ASM2I9940L Low Voltage 1:18 Clock Distribution Chip - Alliance Semiconductor
ASM2I9942C Low Voltage 1:18 Clock Distribution Chip - Alliance Semiconductor
ASM2I99446 2.5V and 3.3V LVCMOS Clock Distribution Buffer - Alliance Semiconductor
ASM2I99447 3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer - Alliance Semiconductor
ASM2I99448 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer - Alliance Semiconductor
ASM2I99456 3.3V/2.5V LVCMOS Clock Fanout Buffer - Alliance Semiconductor
ASM2I99456 3.3V/2.5V LVCMOS Clock Fanout Buffer - PulseCore

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)