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MTY14N100E

ON Semiconductor
Part Number MTY14N100E
Manufacturer ON Semiconductor
Description Power Field Effect Transistor
Published Feb 9, 2016
Detailed Description MTY14N100E TMOS E−FET.™ Power Field Effect Transistor N−Channel Enhancement−Mode Silicon Gate This advanced TMOS power F...
Datasheet PDF File MTY14N100E PDF File

MTY14N100E
MTY14N100E

Overview
MTY14N100E TMOS E−FET.
™ Power Field Effect Transistor N−Channel Enhancement−Mode Silicon Gate This advanced TMOS power FET is designed to withstand high energy in the avalanche and commutation modes.
This new energy efficient design also offers a drain−to−source diode with fast recovery time.
Designed for high voltage, high speed switching applications in power supplies, converters, PWM motor controls, and other inductive loads.
The avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients.
• Avalanche Energy Specified • Diode is Characterized for Use in Bridge Circuits • IDSS and VDS(on) Specified at Elevated Temperature http://onsemi.
com TMOS POWER FET 14 AMPERES, 1000 VOLTS RDS(on) = 0.
80 W TO−264 CASE 340G−02 STYLE 1 D G ® S MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage Drain−to−Gate Voltage (RGS = 1.
0 MΩ) Gate−to−Source Voltage — Continuous — Single Pulse (tp ≤ 50 μs) VDSS VDGR VGS VGSM 1000 1000 ± 20 ± 40 Vdc Vdc Vdc Vpk Drain Current — Continuous — Continuous @ TC = 100°C — Single Pulse (tp ≤ 10 μs) Total Power Dissipation Derate above 25°C ID 14 Adc ID 8.
7 IDM 49 Apk PD 300 Watts 2.
4 W/°C Operating and Storage Temperature Range Single Pulse Drain−to−Source Avalanche Energy — Starting TJ = 25°C (VDD = 100 Vdc, VGS = 10 Vdc, Peak IL = 14 Apk, L = 10 mH, RG = 25 Ω ) TJ, Tstg EAS −55 to 150 980 °C mJ Thermal Resistance — Junction to Case Thermal Resistance — Junction to Ambient RθJC RθJA 0.
42 °C/W 30 Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds TL 260 °C Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented.
SOA Limit curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred d...


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