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SI51218

Silicon Laboratories
Part Number SI51218
Manufacturer Silicon Laboratories
Description Three Output Factory Programmable Clock Generator
Published Mar 4, 2016
Detailed Description Si51218 Data Sheet Three Output Factory Programmable Clock Generator The factory programmable Si51218 is a low power, ...
Datasheet PDF File SI51218 PDF File

SI51218
SI51218


Overview
Si51218 Data Sheet Three Output Factory Programmable Clock Generator The factory programmable Si51218 is a low power, small footprint and frequency flexible programmable clock generator targeting low power, low cost and high volume consumer and embedded applications.
The device operates from a single crystal or an external clock source and generates up to 3 outputs from 32.
768 kHz to 170 MHz.
The device is factory programmed to provide customized output frequencies and control input such as power down and output enable.
Applications • Crystal/XO replacement • Digital media players • Portable devices • DTV/IPTV KEY FEATURES • Generates up to 3 LVCMOS clock outputs from 32.
768 kHz to 170 MHz • Accepts crystal or reference clock input • 3 to 165 MHz reference clock input • 8 to 48 MHz crystal input • Programmable OE input function XIN/ CLKIN 3 PLL with Modulation Control XOUT 2 VDDO 8 VDD 1 VSS 5 To Pin 6/7 V-REG To Core Programmable Configuration Register To Pin 4 Buffers, Dividers, and Switch Matrix 4 CLKOUT1/REFOUT1 (VDD)/OE CLKOUT2/REFOUT2 6 (VDDO)/ OE 7 CLKOUT3 (VDDO) silabs.
com | Smart.
Connected.
Energy-friendly.
Rev.
1.
1 1.
Feature List The Si51218 highlighted features are listed below.
• Generates up to 3 LVCMOS clock outputs from 32.
768 kHz to 170 MHz • Accepts crystal or reference clock input • 3 to 165 MHz reference clock input • 8 to 48 MHz crystal input • Programmable OE input function • Low power dissipation Si51218 Data Sheet Feature List • Separate voltage supply pins • VDD = 2.
5 to 3.
3 V • VDDO = 1.
8 to 3.
3 V (VDDO < VDD) • Low cycle-cycle jitter • Ultra small 8-pin TDFN package (1.
4 mm x 1.
6 mm) silabs.
com | Smart.
Connected.
Energy-friendly.
Rev.
1.
1 | 1 2.
Design Considerations 2.
1 Typical Application Schematic Si51218 Data Sheet Design Considerations 2.
2 Comments and Recommendations Decoupling Capacitor: A decoupling capacitor of 0.
1 μF must be used between VDD and VSS on pins 1 and 8.
Place the capacitor on the component ...



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