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ST92F150CV1

STMicroelectronics
Part Number ST92F150CV1
Manufacturer STMicroelectronics
Description 8/16-bit single voltage Flash MCU
Published Apr 27, 2016
Detailed Description ST92F124xx/ST92F150Cxx/ ST92F150JDV1/ST92F250CV2 8/16-bit single voltage Flash MCU family with RAM, E³ TM (emulated EEP...
Datasheet PDF File ST92F150CV1 PDF File

ST92F150CV1
ST92F150CV1

Overview
ST92F124xx/ST92F150Cxx/ ST92F150JDV1/ST92F250CV2 8/16-bit single voltage Flash MCU family with RAM, E³ TM (emulated EEPROM), CAN 2.
0B and J1850 BLPD Datasheet − production data Features ■ Memories – Internal memory: Single Voltage Flash up to 256 Kbytes, RAM up to 8 Kbytes, 1 Kbyte E3 TM (Emulated EEPROM) – In-Application Programming (IAP) – 224 general purpose registers (register file) available as RAM, accumulators or index pointers ■ Clock, reset and supply management – Register-oriented 8/16 bit CORE with RUN, WFI, SLOW, HALT and STOP modes – 0-24 MHz Operation (Int.
Clock), 4.
5-5.
5 V range – PLL Clock Generator (3-5 MHz crystal) – Minimum instruction time: 83 ns (24 MHz int.
clock) ■ Up to 80 I/O pins ■ Interrupt management – 4 external fast interrupts + 1 NMI – Up to 16 pins programmable as wake-up or additional external interrupt with multi-level interrupt handler ■ DMA controller for reduced processor overhead ■ Timers – 16-bit Timer with 8-bit Prescaler, and Watchdog Timer (activated by software or by hardware) – 16-bit Standard Timer that can be used to generate a time base independent of PLL Clock Generator – Two 16-bit independent Extended Function Timers (EFTs) with Prescaler, up to two Input Captures and up to two Output Compares – Two 16-bit Multifunction Timers, with Prescaler, up to two Input Captures and up to two Output Compares ■ Communication interfaces – Serial Peripheral Interface (SPI) with selectable Master/Slave mode LQFP64 14x14 PQFP100 14x20 LQFP100 14x14 – One Multiprotocol Serial Communications Interface with asynchronous and synchronous capabilities – One asynchronous Serial Communications Interface with 13-bit LIN Synch Break generation capability – J1850 Byte Level Protocol Decoder (JBLPD) – Up to two full I²C multiple Master/Slave Interfaces supporting Access Bus – Up to two CAN 2.
0B Active interfaces ■ Analog peripheral (low current coupling) – 10-bit A/D Converter with up to 16 robust input channels ■ Development tools – Fre...


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