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ADF4355-3

Analog Devices
Part Number ADF4355-3
Manufacturer Analog Devices
Description Microwave Wideband Synthesizer
Published Apr 27, 2016
Detailed Description Data Sheet Microwave Wideband Synthesizer with Integrated VCO ADF4355-3 FEATURES GENERAL DESCRIPTION RF output frequ...
Datasheet PDF File ADF4355-3 PDF File

ADF4355-3
ADF4355-3

Overview
Data Sheet Microwave Wideband Synthesizer with Integrated VCO ADF4355-3 FEATURES GENERAL DESCRIPTION RF output frequency range: 51.
5625 MHz to 6600 MHz The ADF4355-3 allows the implementation of fractional-N or Fractional-N synthesizer and integer-N synthesizer integer-N phase-locked loop (PLL) frequency synthesizers when High resolution 38-bit modulus used with an external loop filter and an external reference Low phase noise, voltage controlled oscillator (VCO) frequency.
A series of frequency dividers at the output provide Programmable divide by 1, 2, 4, 8, 16, 32, or 64 output operation from 51.
5625 MHz to 6600 MHz.
All power supplies: 3.
3 V Logic compatibility: 1.
8 V Programmable dual modulus prescaler of 4/5 or 8/9 Programmable output power level RF output mute function 3-wire serial interface Analog and digital lock detect The ADF4355-3 has an integrated VCO with a fundamental output frequency ranging from 3300 MHz to 6600 MHz.
In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allow the user to generate RF output frequencies as low as 51.
5625 MHz.
For applications that require isolation, the RF output stage can be muted.
The mute function is both pin- and software-controllable.
APPLICATIONS Control of all on-chip registers is through a simple 3-wire interface.
Wireless infrastructure (W-CDMA, TD-SCDMA, The ADF4355-3 operates with analog, digital, charge pump, and WiMAX, GSM, PCS, DCS, DECT) VCO power supplies ranging from 3.
1515 V to 3.
4485 V.
The Point to point/point to multipoint microwave links ADF4355-3 also contains hardware and software power-down Satellites/VSATs modes.
Test equipment/instrumentation Clock generation FUNCTIONAL BLOCK DIAGRAM CE AVDD DVDD VP RSET VVCO VRF AVDD REF IN A REFIN B CLK DATA LE ×2 DOUBLER 10-BIT R COUNTER ÷2 DIVIDER DATA REGISTER FUNCTION LATCH INTEGER REG FRACTION MODULUS REG REG THIRD-ORDER FRACTIONAL INTERPOLATOR LOCK DETECT MULT...


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