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IS61DDP2B42M18A2
36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM
Description
IS61DDP2B42M18A/A1/A2 IS61DDP2B41M36A/A1/A2 2Mx18, 1Mx36 36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM (2.0 Cycle Read Latency) ADVANCED INFORMATION JULY 2012 FEATURES DESCRIPTION 1Mx36 and 2Mx18 configuration available. On-chip Delay-Locked Loop (DLL) for wide data valid window. Common I/O read and write ports. Synchronous pipeline read with self-t...
Integrated Silicon Solution
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