36 Mb (1M x 36. & 2M x 18)
ISSIDDR-II (Burst of 4) CIO Synchronous SRAMs
®
Features
1M x 36 or 2M x 18.
On-chip delay-locked loop (DLL) for wide data valid window.
Common I/O read and write ports.
Synchronous pipeline read with late write operation.
Double data rate (DDR-II) interface for read and write input ports.
Fixed 4-bit burst for read a...
