IS43R32400D
4Mx32
128Mb DDR SDRAM
SEPTEMBER 2011
FEATURES
Double-data rate architecture; two data transfers per clock cycle
Bidirectional, data strobe (DQS) is transmitted/ received with data, to be used in capturing data at the receiver
DQS is edge-aligned with data for READs and centre-aligned with data for WRITEs
Differential clock input...
