DatasheetsPDF.com
74AC11109
Dual J-K Positive-edge-Triggered Flip-Flops
Description
ăą 54AC11109, 74AC11109 DUAL JĆK POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCAS450 − MARCH 1987 − REVISED APRIL 1993 Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C...
Texas Instruments
Download 74AC11109 Datasheet
Similar Datasheet
74AC11109
Dual J-K Positive-edge-Triggered Flip-Flops
- Texas Instruments
74AC11112
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
- Texas Instruments
74AC11132
QUAD 2 INPUT NAND SCHMITT TRIGGER
- Philips
74AC11132
QUADRUPLE 2-INPUT POSITIVE-NAND SCHMITT-TRIGGER
- Texas Instruments
74AC11138
3-Line To 8-Line Decoder/Demultiplexer
- Texas Instruments
74AC11151
1-of-8 Data Selector/Multiplexer
- Texas Instruments
74AC11153
DUAL 4 INPUT MULTIPLEXER
- Philips
74AC11153
DUAL 1-OF-4 DATA SELECTOR/MULTIPLEXER
- Texas Instruments
74AC11157
QUAD 2 INPUT MULTIPLEXER
- Philips
74AC11157
Quadruple 2-Line to 1-Line Data Selector/Multiplexer
- Texas Instruments
@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (
Privacy Policy & Contact
)