SN74LVC1G32 Gate Datasheet

SN74LVC1G32 Datasheet, PDF, Equivalent


Part Number

SN74LVC1G32

Description

Single 2-Input Positive-OR Gate

Manufacture

etcTI

Total Page 30 Pages
Datasheet
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SN74LVC1G32
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SN74LVC1G32
SCES219V – APRIL 1999 – REVISED AUGUST 2015
SN74LVC1G32 Single 2-Input Positive-OR Gate
1 Features
1 Available in the Ultra-Small 0.64 mm2
Package (DPW) with 0.5-mm Pitch
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5-V
• Supports Down Translation to VCC
• Max tpd of 3.6 ns at 3.3-V
• Low Power Consumption, 10-µA Max ICC
• ±24-mA Output Drive at 3.3-V
• Ioff Supports Live Insertion, Partial-Power-Down
Mode, and Back-Drive Protection
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
2 Applications
• AV Receiver
• Blu-ray Player and Home Theater
• Digital Picture Frame (DPF)
• Embedded PC
• IP Phone: Wireless
• High-Speed Data Acquisition and Generation
• Motor Control: High-Voltage
• Optical Networking: Video Over Fiber and EPON
• Personal Navigation Device (GPS)
• Portable Media Player
• Private Branch Exchange (PBX)
• Server PSU
• SSD: Internal and External
• TV: LCD/Digital and High-Definition (HDTV)
• Telecom Shelter: Power Distribution Unit (PDU),
Power Monitoring Unit (PMU), Wireless Battery
Monitoring, Remote Electrical Tilt Unit (RET),
Remote Radio Unit (RRU), Tower Mounted
Amplifier (TMA)
• Video Conferencing: IP-Based HD
• Vector Signal Analyzer and Generator
• WiMAX and Wireless Infrastructure Equipment
• Wireless Headset, Keyboard, Mouse, and
Repeater
3 Description
This single 2-input positive-OR gate is designed for
1.65-V to 5.5-V VCC operation.
The SN74LVC1G32 device performs the Boolean
function Y = A + B or Y = A • B in positive logic.
The CMOS device has high output drive while
maintaining low static power dissipation over a broad
VCC operating range.
The SN74LVC1G32 device is available in a variety of
packages, including the ultra-small DPW package
with a body size of 0.8 × 0.8 mm.
Device Information(1)
DEVICE NAME PACKAGE (PINS)
BODY SIZE
SN74LVC1G32DBV SOT-23 (5)
2.90 mm × 2.80 mm
SN74LVC1G32DCK SC70 (5)
2.00mm × 2.10 mm
SN74LVC1G32DRY SON (6)
1.45 mm × 1.00 mm
SN74LVC1G32DSF SON (6)
1.00 mm × 1.00 mm
SN74LVC1G32DPW X2SON (4)
0.80 mm × 0.80 mm
SN74LVC1G32DRL SOT (5)
1.60 mm × 1.60 mm
SN74LVC1G32YZP DSBGA (5)
1.38 mm × 0.88 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN74LVC1G32
SN74LVC1G32
SCES219V – APRIL 1999 – REVISED AUGUST 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 4
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ..................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions ...................... 6
6.4 Thermal Information .................................................. 6
6.5 Electrical Characteristics........................................... 7
6.6 Switching Characteristics, CL = 15 pF ...................... 7
6.7 Switching Characteristics, 1.8 V and 2.5V................ 7
6.8 Switching Characteristics, 3.3 V and 5 V.................. 8
6.9 Operating Characteristics.......................................... 8
6.10 Typical Characteristics ............................................ 8
7 Parameter Measurement Information .................. 9
8 Detailed Description ............................................ 11
8.1 Overview ................................................................. 11
8.2 Functional Block Diagram ....................................... 11
8.3 Feature Description................................................. 11
8.4 Device Functional Modes........................................ 11
9 Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application ................................................. 12
10 Power Supply Recommendations ..................... 13
11 Layout................................................................... 13
11.1 Layout Guidelines ................................................. 13
11.2 Layout Example .................................................... 13
12 Device and Documentation Support ................. 14
12.1 Community Resources.......................................... 14
12.2 Trademarks ........................................................... 14
12.3 Electrostatic Discharge Caution ............................ 14
12.4 Glossary ................................................................ 14
13 Mechanical, Packaging, and Orderable
Information ........................................................... 14
13.1 Package Option Addendum .................................. 18
4 Revision History
Changes from Revision U (April 2014) to Revision V
Page
• Added TJ junction temp spec to Abs Max Ratings ................................................................................................................. 5
Changes from Revision T (March 2014) to Revision U
Page
• Updated Features, Description, and Device Information table............................................................................................... 1
• Added Pin Functions table. .................................................................................................................................................... 4
• Added Thermal Information table. ......................................................................................................................................... 6
• Added Detailed Description section. .................................................................................................................................... 11
• Added Application and Implementation section. ................................................................................................................. 12
• Added Layout section. ......................................................................................................................................................... 13
Changes from Revision S (July 2013) to Revision T
Page
• Updated Features. .................................................................................................................................................................. 1
• Added Applications. ................................................................................................................................................................ 1
• Added Device Information table. ............................................................................................................................................ 1
• Added DPW Package. ........................................................................................................................................................... 4
• Moved Tstg to Handling Ratings table. .................................................................................................................................... 5
Changes from Revision R (June 2013) to Revision S
Page
• Added parameter values for –40 to 125°C temperature ratings............................................................................................. 7
2 Submit Documentation Feedback
Copyright © 1999–2015, Texas Instruments Incorporated
Product Folder Links: SN74LVC1G32


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LVC1G32 SCES219V – APR IL 1999 – REVISED AUGUST 2015 SN74LVC 1G32 Single 2-Input Positive-OR Gate 1 Features •1 Available in the Ultra-S mall 0.64 mm2 Package (DPW) with 0.5-mm Pitch • Supports 5-V VCC Operation Inputs Accept Voltages to 5.5-V • Supports Down Translation to VCC • Ma x tpd of 3.6 ns at 3.3-V • Low Power Consumption, 10-µA Max ICC • ±24-mA Output Drive at 3.3-V • Ioff Support s Live Insertion, Partial-Power-Down Mo de, and Back-Drive Protection • Latch -Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceed s JESD 22 – 2000-V Human-Body Model ( A114-A) – 200-V Machine Model (A115-A ) – 1000-V Charged-Device Model (C101 ) 2 Applications • AV Receiver • Bl u-ray Player and Home Theater • Digit al Picture Frame (DPF) • Embedded PC • IP Phone: Wireless • High-Speed D ata Acquisition and Generation • Motor Control: High-Voltage • Optical Networking: Video Over Fiber and EPO.
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