DAC0830 Double-Buffered DAC Datasheet

DAC0830 Datasheet, PDF, Equivalent


Part Number

DAC0830

Description

Double-Buffered DAC

Manufacture

etcTI

Total Page 30 Pages
Datasheet
Download DAC0830 Datasheet


DAC0830
DAC0830, DAC0832
www.ti.com
SNAS534B – MAY 1999 – REVISED MARCH 2013
DAC0830/DAC0832 8-Bit μP Compatible, Double-Buffered D to A Converters
Check for Samples: DAC0830, DAC0832
FEATURES
1
234 Double-Buffered, Single-Buffered or Flow-
Through Digital Data Inputs
• Easy Interchange and Pin-Compatible with 12-
bit DAC1230 Series
• Direct Interface to All Popular
Microprocessors
• Linearity Specified with Zero and Full Scale
Adjust Only—NOT BEST STRAIGHT LINE FIT.
• Works with ±10V Reference-Full 4-Quadrant
Multiplication
• Can Be Used in the Voltage Switching Mode
• Logic Inputs Which Meet TTL Voltage Level
Specs (1.4V Logic Threshold)
• Operates “STAND ALONE” (without μP) if
Desired
• Available in 20-Pin SOIC or PLCC Package
KEY SPECIFICATIONS
• Current Settling Time: 1 μs
• Resolution: 8 bits
• Linearity: 8, 9, or 10 bits (Ensured Over
Temp.)
• Gain Tempco: 0.0002% FS/°C
• Low Power Dissipation: 20 mW
• Single Power Supply: 5 to 15 VDC
DESCRIPTION
The DAC0830 is an advanced CMOS/Si-Cr 8-bit
multiplying DAC designed to interface directly with the
8080, 8048, 8085, Z80®, and other popular
microprocessors. A deposited silicon-chromium R-2R
resistor ladder network divides the reference current
and provides the circuit with excellent temperature
tracking characteristics (0.05% of Full Scale Range
maximum linearity error over temperature). The circuit
uses CMOS current switches and control logic to
achieve low power consumption and low output
leakage current errors. Special circuitry provides TTL
logic input voltage level compatibility.
Double buffering allows these DACs to output a
voltage corresponding to one digital word while
holding the next digital word. This permits the
simultaneous updating of any number of DACs.
The DAC0830 series are the 8-bit members of a
family of microprocessor-compatible DACs (MICRO-
DAC).
Typical Application
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
BI-FET is a trademark of Texas Instruments.
2
Z80 is a registered trademark of Zilog Corporation.
3
All other trademarks are the property of their respective owners.
4
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2013, Texas Instruments Incorporated

DAC0830
DAC0830, DAC0832
SNAS534B – MAY 1999 – REVISED MARCH 2013
Connection Diagrams
(Top Views)
www.ti.com
Figure 1. PDIP, CDIP, and SOIC Packages
Figure 2. PLCC Package
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)(3)
Supply Voltage (VCC)
Voltage at Any Digital Input
Voltage at VREF Input
Storage Temperature Range
65°C to +150°C
ESD Susceptability(5)(6)
Lead
Temperature
(Soldering, 10
sec.)
PDIP Package (plastic)
CDIP Package (ceramic)
SOIC Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
Package Dissipation at
TA=25°C (4)
DC Voltage Applied to
IOUT1 or IOUT2 (5)
17 VDC
VCC to GND
±25V
500 mW
100 mV to VCC
800V
260°C
300°C
215°C
220°C
(1) All voltages are measured with respect to GND, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not
apply when operating the device beyond its specified operating conditions.
(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation at any temperature is PD = (TJMAX TA)/θJA or the number given in the Absolute
Maximum Ratings, whichever is lower. For this device, TJMAX = 125°C (plastic) or 150°C (ceramic), and the typical junction-to-ambient
thermal resistance of the J package when board mounted is 80°C/W. For the NFH package, this number increases to 100°C/W and for
the FN package this number is 120°C/W.
(5) For current switching applications, both IOUT1 and IOUT2 must go to ground or the “Virtual Ground” of an operational amplifier. The
linearity error is degraded by approximately VOS ÷ VREF. For example, if VREF = 10V then a 1 mV offset, VOS, on IOUT1 or IOUT2 will
introduce an additional 0.01% linearity error.
(6) Human body model, 100 pF discharged through a 1.5 kΩ resistor.
2 Submit Documentation Feedback
Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: DAC0830 DAC0832


Features DAC0830, DAC0832 www.ti.com SNAS534B MAY 1999 – REVISED MARCH 2013 DAC 0830/DAC0832 8-Bit μP Compatible, Doub le-Buffered D to A Converters Check for Samples: DAC0830, DAC0832 FEATURES 1 •234 Double-Buffered, Single-Buffered or FlowThrough Digital Data Inputs • Easy Interchange and Pin-Compatible wi th 12bit DAC1230 Series • Direct Inte rface to All Popular Microprocessors Linearity Specified with Zero and Ful l Scale Adjust Only—NOT BEST STRAIGHT LINE FIT. • Works with ±10V Referen ce-Full 4-Quadrant Multiplication • C an Be Used in the Voltage Switching Mod e • Logic Inputs Which Meet TTL Volta ge Level Specs (1.4V Logic Threshold) Operates “STAND ALONE” (without μP) if Desired • Available in 20-Pin SOIC or PLCC Package KEY SPECIFICATIO NS • Current Settling Time: 1 μs • Resolution: 8 bits • Linearity: 8, 9 , or 10 bits (Ensured Over Temp.) • G ain Tempco: 0.0002% FS/°C • Low Powe r Dissipation: 20 mW • Single Power Supply: 5 to 15 VDC DESCRIPTION The DAC0830 is an advanced CMOS/Si-Cr .
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