CPU. MC9S08PB16 Datasheet

MC9S08PB16 CPU. Datasheet pdf. Equivalent

MC9S08PB16 Datasheet
Recommendation MC9S08PB16 Datasheet
Part MC9S08PB16
Description CPU
Feature MC9S08PB16; NXP Semiconductors Data Sheet: Technical Data MC9S08PB16 Data Sheet Supports: MC9S08PB16 and MC9S08P.
Manufacture NXP
Datasheet
Download MC9S08PB16 Datasheet




NXP MC9S08PB16
NXP Semiconductors
Data Sheet: Technical Data
MC9S08PB16 Data Sheet
Supports: MC9S08PB16 and
MC9S08PB8
Key features
• 8-Bit S08 central processor unit (CPU)
– Up to 20 MHz bus at 2.7 V to 5.5 V across operating
temperature range
– Supporting up to 30 interrupt/reset sources
– Supporting up to four-level nested interrupt
– On-chip memory
– Up to 16 KB flash read/program/erase over full
operating voltage and temperature
– Up to 1 KB random-access memory (RAM)
– Flash and RAM access protection
• Power-saving modes
– One low power stop mode; reduced power wait
mode
– Peripheral clock enable register can disable clocks to
unused modules, reducing currents; allows clocks to
remain enabled to specific peripherals in stop3 mode
• Clocks
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference;
precision trimming of internal reference allows 0.2%
resolution; 1% deviation across temperature range of
0 ºC to 70ºC, 1.5% deviation across temperature
range of –40 ºC to 105 ºC and 2% deviation across
temperature range of –40 ºC to 125 ºC; Up to 20
MHz
– Oscillator (XOSC) — Loop-controlled Pierce
oscillator; crystal or ceramic resonator range of
31.25 kHz to 39.0625 kHz or 4 MHz to 20 MHz
• System protection
– Watchdog with independent clock source
– Low-voltage detection with reset or interrupt;
selectable trip points
– Illegal opcode detection with reset
– Illegal address detection with reset
Document Number MC9S08PB16
Rev. 2.1, 11/2019
MC9S08PB16
• Peripherals
– ADC - 12-channel, 12-bit resolution; 2.5 µs
conversion time; eight-level data FIFO with optional
watermark; automatic compare function; 1.7 mV/ºC
temperature sensor; internal bandgap reference
channel; operation in stop; optional hardware trigger
– FTM - Two flex timer modulators (FTM) modules
including one 6-channel (FTM2) and one 2-channel
(FTM0) backward compatible with TPM modules;
16-bit counter; each channel can be configured for
input capture, output compare, edge- or center-
aligned PWM mode
– FDS - Shut down output pin upon fault detection;
the fault sources can be optional enabled separately;
the output pin can be configured as output 1,0 and
high impedance when a fault occurs based on
module configuration
– MTIM - Two modulo timers with 8-bit prescaler and
overflow interrupt
– PWT — One pulse width timer used to captures a
pulse width and pulse period
– SCI - One serial communications interface (SCI/
UART) modules optional 13-bit break; Full duplex
non-return to zero (NRZ); LIN extension support
– I2C - One inter-integrated circuit module; up to 400
kbps; multi-master operation; programmable slave
address; supporting broadcast mode and 10-bit
addressing; supporting SMBUS
– ACMP - Two analog comparators with both positive
and negative inputs; selectable voltage reference
provided by on-chip 6-bit DAC; separately
selectable interrupt on rising and falling comparator
output
– OPAMP — One analog amplifier (OPAMP) with
fixed gain x20, supporting up to 100 mV single-
ended input.
– RTC - 16-bit real timer counter (RTC)
– CRC - Cyclic Redundancy Check with
programmable 16-/32-bit polynomial generator
– KBI — Up to 8 keyboard interrupt inputs
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.



NXP MC9S08PB16
• Development support
– Single-wire background debug interface
– Breakpoint capability to allow three breakpoints setting during in-circuit debugging
– On-chip in-circuit emulator (ICE) debug module containing two comparators and nine trigger modes
• Input/Output
– Up to 18 GPIOs including one output-only pin (PTA4)
– One 8-bit keyboard interrupt modules (KBI)
– One true open drain pin (PTB0)
• Package options
– 20-pin TSSOP
– 16-pin TSSOP
MC9S08PB16 Data Sheet, Rev. 2.1, 11/2019
2 NXP Semiconductors



NXP MC9S08PB16
Table of Contents
1 Overview............................................................................................ 4
6.2 Switching specifications............................................................ 17
1.1 MCU block diagram.................................................................. 4
6.2.1 Control timing..............................................................17
1.2 Peripheral register addresses......................................................5
6.2.2 Debug trace timing specifications................................18
1.3 System interconnection..............................................................6
6.2.3 FTM module timing.....................................................19
2 Orderable part numbers......................................................................7
6.3 Thermal specifications...............................................................20
3 Part identification............................................................................... 7
6.3.1 Thermal characteristics................................................ 20
3.1 Description.................................................................................7
7 Peripheral operating requirements and behaviors.............................. 20
3.2 Format........................................................................................8
7.1 External oscillator (XOSC) and ICS characteristics..................20
3.3 Fields..........................................................................................8
7.2 NVM specifications................................................................... 22
3.4 Example..................................................................................... 8
7.3 Analog........................................................................................23
4 Parameter Classification.....................................................................8
7.3.1 ADC characteristics..................................................... 23
5 Ratings................................................................................................9
7.3.2 Analog comparator (ACMP) electricals...................... 26
5.1 Thermal handling ratings...........................................................9
7.3.3 Operational amplifier (OPAMP) electricals................ 26
5.2 Moisture handling ratings.......................................................... 9
7.3.4 Inter-Integrated Circuit Interface (I2C) timing............ 27
5.3 ESD handling ratings.................................................................9
8 Dimensions.........................................................................................28
5.4 Voltage and current operating ratings........................................10
8.1 Obtaining package dimensions.................................................. 28
6 General............................................................................................... 11
9 Pinout................................................................................................. 28
6.1 Nonswitching electrical specifications...................................... 11
9.1 Signal multiplexing and pin assignments.................................. 28
6.1.1 DC characteristics........................................................ 11
9.2 Device pin assignment...............................................................29
6.1.2 Supply current characteristics...................................... 15
10 Hardware design consideration.......................................................... 30
6.1.3 EMC performance........................................................16
11 Revision history................................................................................. 31
NXP Semiconductors
MC9S08PB16 Data Sheet, Rev. 2.1, 11/2019
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