A/D Converters. ADC0805 Datasheet

ADC0805 Converters. Datasheet pdf. Equivalent

ADC0805 Datasheet
Recommendation ADC0805 Datasheet
Part ADC0805
Description 8-Bit uP Compatible A/D Converters
Feature ADC0805; ADC0801/ADC0802/ADC0803/ADC0804/ADC0805 8-Bit µP Compatible A/D Converters November 1999 ADC0801/A.
Manufacture National Semiconductor
Datasheet
Download ADC0805 Datasheet




National Semiconductor ADC0805
November 1999
ADC0801/ADC0802/ADC0803/ADC0804/ADC0805
8-Bit µP Compatible A/D Converters
General Description
The ADC0801, ADC0802, ADC0803, ADC0804 and
ADC0805 are CMOS 8-bit successive approximation A/D
converters that use a differential potentiometric
ladder — similar to the 256R products. These converters are
designed to allow operation with the NSC800 and INS8080A
derivative control bus with TRI-STATE® output latches di-
rectly driving the data bus. These A/Ds appear like memory
locations or I/O ports to the microprocessor and no interfac-
ing logic is needed.
Differential analog voltage inputs allow increasing the
common-mode rejection and offsetting the analog zero input
voltage value. In addition, the voltage reference input can be
adjusted to allow encoding any smaller analog voltage span
to the full 8 bits of resolution.
Features
n Compatible with 8080 µP derivatives — no interfacing
logic needed - access time - 135 ns
n Easy interface to all microprocessors, or operates “stand
alone”
n Differential analog voltage inputs
n Logic inputs and outputs meet both MOS and TTL
voltage level specifications
n Works with 2.5V (LM336) voltage reference
n On-chip clock generator
n 0V to 5V analog input voltage range with single 5V
supply
n No zero adjust required
n 0.3" standard width 20-pin DIP package
n 20-pin molded chip carrier or small outline package
n Operates ratiometrically or with 5 VDC, 2.5 VDC, or
analog span adjusted voltage reference
Key Specifications
n Resolution
n Total error
n Conversion time
8 bits
±14 LSB, ±12 LSB and ±1 LSB
100 µs
Connection Diagram
ADC080X
Dual-In-Line and Small Outline (SO) Packages
Ordering Information
TEMP RANGE
±14 Bit Adjusted
ERROR
±12 Bit Unadjusted
±12 Bit Adjusted
±1Bit Unadjusted
PACKAGE OUTLINE
DS005671-30
See Ordering Information
0˚C TO 70˚C
ADC0802LCWM
ADC0804LCWM
M20B — Small
Outline
0˚C TO 70˚C
−40˚C TO +85˚C
ADC0801LCN
ADC0802LCN
ADC0803LCN
ADC0804LCN
ADC0805LCN/ADC0804LCJ
N20A — Molded DIP
TRI-STATE® is a registered trademark of National Semiconductor Corp.
Z-80® is a registered trademark of Zilog Corp.
© 1999 National Semiconductor Corporation DS005671
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National Semiconductor ADC0805
Typical Applications
8080 Interface
DS005671-1
DS005671-31
Part
Number
ADC0801
ADC0802
ADC0803
ADC0804
ADC0805
Error Specification (Includes Full-Scale,
Zero Error, and Non-Linearity)
Full-
Scale
VREF/2=2.500 VDC
(No Adjustments)
VREF/2=No Connection
(No Adjustments)
Adjusted
±14 LSB
±12 LSB
±12 LSB
±1 LSB
±1 LSB
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National Semiconductor ADC0805
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC) (Note 3)
Voltage
Logic Control Inputs
At Other Input and Outputs
Lead Temp. (Soldering, 10 seconds)
Dual-In-Line Package (plastic)
Dual-In-Line Package (ceramic)
Surface Mount Package
Vapor Phase (60 seconds)
6.5V
−0.3V to +18V
−0.3V to (VCC+0.3V)
260˚C
300˚C
215˚C
Infrared (15 seconds)
Storage Temperature Range
Package Dissipation at TA=25˚C
ESD Susceptibility (Note 10)
220˚C
−65˚C to +150˚C
875 mW
800V
Operating Ratings (Notes 1, 2)
Temperature Range
ADC0804LCJ
ADC0801/02/03/05LCN
ADC0804LCN
ADC0802/04LCWM
Range of VCC
TMINTATMAX
−40˚CTA+85˚C
−40˚CTA+85˚C
0˚CTA+70˚C
0˚CTA+70˚C
4.5 VDC to 6.3 VDC
Electrical Characteristics
The following specifications apply for VCC=5 VDC, TMINTATMAX and fCLK=640 kHz unless otherwise specified.
Parameter
Conditions
Min Typ Max
ADC0801: Total Adjusted Error (Note 8)
With Full-Scale Adj.
±14
(See Section 2.5.2)
ADC0802: Total Unadjusted Error (Note 8)
ADC0803: Total Adjusted Error (Note 8)
VREF/2=2.500 VDC
With Full-Scale Adj.
±12
±12
(See Section 2.5.2)
ADC0804: Total Unadjusted Error (Note 8)
ADC0805: Total Unadjusted Error (Note 8)
VREF/2 Input Resistance (Pin 9)
VREF/2=2.500 VDC
VREF/2-No Connection
ADC0801/02/03/05
ADC0804 (Note 9)
2.5
0.75
8.0
1.1
±1
±1
Analog Input Voltage Range
DC Common-Mode Error
(Note 4) V(+) or V(−)
Over Analog Input Voltage
Gnd–0.05
±1/16
VCC+0.05
±18
Range
Power Supply Sensitivity
VCC=5 VDC ±10% Over
Allowed VIN(+) and VIN(−)
Voltage Range (Note 4)
±1/16
±18
Units
LSB
LSB
LSB
LSB
LSB
k
k
VDC
LSB
LSB
AC Electrical Characteristics
The following specifications apply for VCC=5 VDC and TMINTATMAX unless otherwise specified.
Symbol
Parameter
Conditions
Min Typ Max
TC Conversion Time
TC Conversion Time
fCLK Clock Frequency
Clock Duty Cycle
fCLK=640 kHz (Note 6)
(Notes 5, 6)
VCC=5V, (Note 5)
103 114
66 73
100 640 1460
40 60
CR Conversion Rate in Free-Running INTR tied to WR with
8770
9708
tW(WR)L
tACC
Mode
Width of WR Input (Start Pulse Width)
Access Time (Delay from Falling
Edge of RD to Output Data Valid)
CS =0 VDC, fCLK=640 kHz
CS =0 VDC (Note 7)
CL=100 pF
100
135 200
t1H, t0H
TRI-STATE Control (Delay
from Rising Edge of RD to
CL=10 pF, RL=10k
(See TRI-STATE Test
125 200
Hi-Z State)
Circuits)
tWI, tRI
Delay from Falling Edge
of WR or RD to Reset of INTR
300 450
CIN Input Capacitance of Logic
Control Inputs
5 7.5
Units
µs
1/fCLK
kHz
%
conv/s
ns
ns
ns
ns
pF
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