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x 16-bit. HM62W16258BI Datasheet |
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HM62W16258BI Series
4 M SRAM (256-kword × 16-bit)
ADE-203-1072A (Z)
Rev. 1.0
Jun. 10, 1999
Description
The Hitachi HM62W16258BI Series is 4-Mbit static RAM organized 262,144-word × 16-bit.
HM62W16258BI Series has realized higher density, higher performance and low power consumption by
employing Hi-CMOS process technology. It offers low power standby power dissipation; therefore, it is
suitable for battery backup systems. It is packaged in standard 44-pin plastic TSOPII.
Features
• Single 3.3 V supply: 3.3 V ± 0.3 V
• Fast access time: 70 ns (max)
• Power dissipation:
Active: 9.9 mW (typ)
Standby: 3.3 µW (typ)
• Completely static memory.
No clock or timing strobe required
• Equal access and cycle times
• Common data input and output.
Three state output
• Battery backup operation.
• Temperature range: –40 to 85°C
Ordering Information
Type No.
HM62W16258BLTTI-7
Access time
70 ns
Package
400-mil 44-pin plastic TSOPII (normal-bend type) (TTP-44DB)
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HM62W16258BI Series
Pin Arrangement
A4
A3
A2
A1
A0
CS
I/O0
I/O1
I/O2
I/O3
VCC
VSS
I/O4
I/O5
I/O6
I/O7
WE
A17
A16
A15
A14
A13
44-pin TSOP
1 44
2 43
3 42
4 41
5 40
6 39
7 38
8 37
9 36
10 35
11 34
12 33
13 32
14 31
15 30
16 29
17 28
18 27
19 26
20 25
21 24
22 23
(Top view)
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
VSS
VCC
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
A12
Pin Description
Pin name
A0 to A17
I/O0 to I/O15
CS
WE
OE
LB
UB
VCC
VSS
NC
Function
Address input
Data input/output
Chip select
Write enable
Output enable
Lower byte select
Upper byte select
Power supply
Ground
No connection
2
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Block Diagram
LSB
A4
A3
A15
A14
A16
A1
A2
A17
A0
MSB
A13
I/O0
I/O15
CS
LB
UB
WE
OE
HM62W16258BI Series
Row
decoder
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•
•
•
•
Memory matrix
2,048 x 2,048
V CC
V SS
Input
data
control
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•
Column I/O
Column decoder
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LSB A7 A6A5A8 A9A10A11A12MSB
••
Control logic
3
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