X28HT512 E2PROM Datasheet

X28HT512 Datasheet, PDF, Equivalent


Part Number

X28HT512

Description

High Temperature/ 5 Volt/ Byte Alterable E2PROM

Manufacture

Xicor

Total Page 13 Pages
Datasheet
Download X28HT512 Datasheet


X28HT512
X28HT512
512K
X28HT512
64K x 8 Bit
High Temperature, 5 Volt, Byte Alterable E2PROM
FEATURES
175°C Full Functionality
Simple Byte and Page Write
—Single 5V Supply
—Self-Timed
—No Erase Before Write
—No Complex Programming Algorithms
—No Overerase Problem
Highly Reliable Direct Write™ Cell
—Endurance: 10,000 Write Cycles
—Data Retention: 100 Years
—Higher Temperature Functionality is Possible
by Operating in the Byte Mode
DESCRIPTION
The X28HT512 is an 64K x 8 CMOS E2PROM, fabri-
cated with Xicor’s proprietary, high performance, float-
ing gate CMOS technology which provides Xicor prod-
ucts superior high temperature performance character-
istics. Like all Xicor programmable nonvolatile memo-
ries the X28HT512 is a 5V only device. The X28HT512
features the JEDEC approved pinout for bytewide memo-
ries, compatible with industry standard EPROMS.
The X28HT512 supports a 128-byte page write opera-
tion, effectively providing a 39µs/byte write cycle and
enabling the entire memory to be written in less than 2.5
seconds.
PIN CONFIGURATION
VBB
NC
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
FLAT PACK
CERDIP
SOIC (R)
1 32
2 31
3 30
4 29
5 28
6 27
7 26
8 25
X28HT512
9 24
10 23
11 22
12 21
13 20
14 19
15 18
16 17
VCC
WE
NC
A14
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/04
I/O3
6614 FHD F02.1
© Xicor, Inc. 1991, 1995, 1996 Patents Pending
6614-1.5 8/5/97 T2/C0/D0 EW
PGA
I/O0 I/O2 I/O3 I/O5 I/O6
15 17 19 21 22
A1 A0 I/O1 VSS I/O4 I/O7 CE
13 14 16 18 20 23 24
A2 A3
12 11
A10 OE
25 26
A4 A5
10 9
X28HT512
A11 A9
27 28
(BOTTOM VIEW)
A6 A7
87
A8 A13
29 30
A12 A15 NC VCC NC NC A14
6 5 2 36 34 32 31
NC VBB NC WE NC
4 3 1 35 33
6614 FHD F23
1 Characteristics subject to change without notice

X28HT512
X28HT512
PIN DESCRIPTIONS
Addresses (A0–A15)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, power consumption
is reduced.
Output Enable (OE)
The Output Enable input controls the data output buffers
and is used to initiate read operations.
Data In/Data Out (I/O0–I/O7)
Data is written to or read from the X28HT512 through the
I/O pins.
Back Bias Voltage (VBB)
It is required to provide -3V on pin 1. This negative
voltage improves higher temperature functionality.
Write Enable (WE)
The Write Enable input controls the writing of data to the
X28HT512.
PIN NAMES
Symbol
A0–A15
I/O0–I/O7
WE
CE
OE
VBB
VCC
VSS
NC
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
–3V
+5V
Ground
No Connect
6614 PGM T01
FUNCTIONAL DIAGRAM
A7–A15
X BUFFERS
LATCHES AND
DECODER
512K-BIT
E2PROM
ARRAY
A0–A6
Y BUFFERS
LATCHES AND
DECODER
CE
OE
WE
VCC
VSS
VBB
CONTROL
LOGIC AND
TIMING
I/O BUFFERS
AND LATCHES
I/O0–I/O7
DATA INPUTS/OUTPUTS
6614 FHD F01
2


Features X28HT512 512K X28HT512 High Temperature , 5 Volt, Byte Alterable E2PROM 64K x 8 Bit FEATURES • 175°C Full Functio nality DESCRIPTION The X28HT512 is an 64K x 8 CMOS E2PROM, fabricated with Xi cor’s proprietary, high performance, floating gate CMOS technology which pro vides Xicor products superior high temp erature performance characteristics. Li ke all Xicor programmable nonvolatile m emories the X28HT512 is a 5V only devic e. The X28HT512 features the JEDEC appr oved pinout for bytewide memories, comp atible with industry standard EPROMS. T he X28HT512 supports a 128-byte page wr ite operation, effectively providing a 39µs/byte write cycle and enabling the entire memory to be written in less th an 2.5 seconds. • • Simple Byte and Page Write —Single 5V Supply —S elf-Timed —No Erase Before Write —N o Complex Programming Algorithms —No Overerase Problem Highly Reliable Direc t Write™ Cell —Endurance: 10,000 Wr ite Cycles —Data Retention: 100 Years —Higher Temperature Functionality is Possible by .
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