Crosspoint Switch. TQ8016 Datasheet


TQ8016 Switch. Datasheet pdf. Equivalent


Part Number

TQ8016

Description

1.3 Gigabit/sec 16x16 Digital ECL Crosspoint Switch

Manufacture

TriQuint Semiconductor

Total Page 9 Pages
Datasheet
Download TQ8016 Datasheet


TQ8016
TRIQUINT
S E M I C O N D U C T O R, I N C .
D0..15
D0..15
CONFIGURE
RESET
LOAD
IA0..3
OA0..3
Input
Buffers
16 x 16
Crosspoint
Switch
Matrix
Output
Buffers
64
(R2)
Sixteen 4-Bit Latches
64
(R1)
4
Sixteen 4-Bit Addressable
Output Select Latches
4 4:16
Decoder
TQ8016
O0..15
O0..15
VCC
VEE
GND
TQ8016
1.3 Gigabit/sec
16x16 Digital ECL
Crosspoint Switch
The TQ8016 is a 16 x 16 differential digital crosspoint switch capable of
handling 1.3 Gbit/s data rate. The high data rate and exceptional signal
fidelity is made possible with TriQuint's fully differential Source-Coupled
FET Logic (SCFL) standard cells. The symmetrical switching characteristic
inherent in differential logic results in low signal skew and crosstalk for
maximum signal fidelity.
The user can independently configure any switch output to any input,
including an input chosen by another output. To configure the switch, the
4-bit output address (OA0..3) is decoded to enable the loading of the 4-bit
input selection data (IA0..3) on the rising edge of the LOAD signal. The
process is repeated until all desired connections are programmed. By
bringing the CONFIGURE signal high, the contents of the Output Select
Latches are transferred in parallel to a second row of 4-bit latches (R2),
causing the switch reconfiguration.
This double row architecture minimizes the time to completely reconfigure
the switch since a new set of addresses can be loaded to the Output Select
Latches (R1) while the switch is active (transmitting). At the time of
reconfiguration, no data drop-out occurs for any output whose input
connection does not change.
Typical output waveform with
all channels driven
Features
• >1.3 Gigabit/sec data rate
• Non-blocking architecture
• +200 ps delay match (one
input to all outputs)
ECL-level data inputs/outputs;
CMOS-level control inputs
• Low crosstalk
• Fully differential data path
• Double row of output select
latches minimizes
reconfiguration time
• Available in 132-pin leaded
chip carrier
For applications which do not require synchronous configuration of the
switch, the LOAD and CONFIGURE inputs may be tied together.
For additional information and latest specifications, see our website: www.triquint.com
1

TQ8016
TQ8016
Figure 1. TQ8016 Architecture
.
DATA IN 0
(I0)
.
.
.
.
.
Input
Buffers
.
.
.
.
.
.
DATA IN 15
(I15)
16 X 1-BIT
MULTIPLEXER
16 X 1-BIT
MULTIPLEXER
DATA
OUT 0
(O0)
CONFIGURE
RESET
LOAD
OUTPUT
4
4:16
DECODE
SELECT ADDRESS
(OA0:3)
Configuration
Register
5
Program Register
4 INPUT ADDRESS
(IA0:3)
DATA
OUT 15
(O15)
Table 1. Pin Descriptions
Pin Name
D0–D15
D0–D15
D0–D15
O0–O15
O0–O15
IA0–IA3
OA0–OA3
CONFIGURE
Levels
ECL
ECL
ECL
ECL
ECL
CMOS
CMOS
CMOS
Description
Differential Data Inputs
Differential Data Inputs
Differential Data Inputs
Differential Data Outputs
Differential Data Outputs
Input Address
Output Address
Switch Reconfiguration
3 For additional information and latest specifications, see our website: www.triquint.com


Features T R I Q U I N T S E M I C O N D U C T O R, I N C . TQ8016 D0..15 D0..1 5 Input Buffers 16 x 16 Crosspoint Swit ch Matrix 64 CONFIGURE (R2) Sixteen 4-B it Latches 64 (R1) Sixteen 4-Bit Addres sable Output Select Latches 4:16 Decode r VCC VEE OA0..3 4 TQ8016 GND Output Bu ffers O0..15 O0..15 1.3 Gigabit/sec 16 x16 Digital ECL Crosspoint Switch SWITC HING PRODUCTS RESET LOAD IA0..3 4 The TQ8016 is a 16 x 16 differential digit al crosspoint switch capable of handlin g 1.3 Gbit/s data rate. The high data r ate and exceptional signal fidelity is made possible with TriQuint's fully dif ferential Source-Coupled FET Logic (SCF L) standard cells. The symmetrical swit ching characteristic inherent in differ ential logic results in low signal skew and crosstalk for maximum signal fidel ity. The user can independently configu re any switch output to any input, incl uding an input chosen by another output . To configure the switch, the 4-bit ou tput address (OA0..3) is decoded to enable the loading of the 4.
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