TN2124 DMOS FETs Datasheet

TN2124 Datasheet, PDF, Equivalent


Part Number

TN2124

Description

N-Channel Enhancement-Mode Vertical DMOS FETs

Manufacture

Supertex Inc

Total Page 5 Pages
Datasheet
Download TN2124 Datasheet


TN2124
Supertex inc.
TN2124
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low CISS and fast switching speeds
Excellent thermal stability
Integral source-drain diode
High input impedance and high gain
Applications
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo-voltaic drives
Analog switches
General purpose line drivers
Telecom switches
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input impedance
and positive temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary
breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Ordering Information
Product Summary
Part Number
Package Option
Packing
TN2124K1-G
TO-236AB (SOT-23) 3000/Reel
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Absolute Maximum Ratings
Parameter
Value
BVDSS/BVDGS
240V
RDS(ON)
(max)
15Ω
Pin Configuration
DRAIN
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature -55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
SOURCE
GATE
TO-236AB (SOT-23)
Product Marking
VGS(th)
(max)
2.0V
Typical Thermal Resistance
Package
θja
TO-236AB (SOT-23)
203OC/W
N1CW
W = Code for Week Sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-236AB (SOT-23)
Doc.# DSFP-TN2124
C080913
Supertex inc.
www.supertex.com

TN2124
TN2124
Thermal Characteristics
Package
(continIDuous)
TO-236AB (SOT-23)
134mA
Notes:
† ID (continuous) is limited by max rated Tj .
ID
(pulsed)
250mA
Power Dissipation
@TC = 25OC
0.36W
IDR
134mA
IDRM
250mA
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter
Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage
240 - - V VGS = 0V, ID = 1.0mA
VGS(th) Gate threshold voltage
0.8 - 2.0 V VGS = VDS, ID= 1.0mA
ΔVGS(th) Change in VGS(th) with temperature
- - -5.5 mV/OC VGS = VDS, ID= 1.0mA
IGSS Gate body leakage
- 0.1 100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current
- - 1.0
VGS = 0V, VDS = Max Rating
-
-
100
µA VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current
140 -
- mA VGS = 4.5V, VDS = 25V
RDS(ON) Static drain-to-source on-state resistance
- - 30 Ω VGS = 3.0V, ID = 25mA
- - 15 Ω VGS = 4.5V, ID = 120mA
ΔRDS(ON) Change in RDS(ON) with temperature
- 0.7 1.0 %/OC VGS = 4.5V, ID = 120mA
GFS Forward transductance
100 170
- mmho VDS = 25V, ID = 120mA
CISS
COSS
CRSS
Input capacitance
Common source output capacitance
Reverse transfer capacitance
- 38 50
VGS = 0V,
- 9.0 15 pF VDS = 25V,
- 3.0 5.0
f = 1.0MHz
td(ON)
tr
td(OFF)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
- 4.0 7.0
- 2.0 5.0
VDD = 25V,
- 7.0 10
ns ID = 140mA,
RGEN = 25Ω
- 9.0 12
VSD Diode forward voltage drop
- - 1.8 V VGS = 0V, ISD = 120mA
trr Reverse recovery time
- 400 -
ns VGS = 0V, ISD = 120mA
Notes:
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
10V
INPUT
0V
10%
t(ON)
td(ON)
tr
90%
t(OFF)
td(OFF)
tf
Pulse
Generator
RGEN
VDD
RL
OUTPUT
VDD
OUTPUT
0V
10%
90%
10%
90%
INPUT
D.U.T.
Doc.# DSFP-TN2124
C080913
Supertex inc.
2 www.supertex.com


Features Supertex inc. TN2124 N-Channel Enhance ment-Mode Vertical DMOS FET Features Free from secondary breakdown ► Lo w power drive requirement ► Ease of p aralleling ► Low CISS and fast switch ing speeds ► Excellent thermal stabil ity ► Integral source-drain diode ► High input impedance and high gain App lications ►► Logic level interfaces – ideal for TTL and CMOS ►► Soli d state relays ►► Battery operated systems ►► Photo-voltaic drives ► ► Analog switches ►► General purp ose line drivers ►► Telecom switche s General Description This low thresho ld, enhancement-mode (normally-off) tra nsistor utilizes a vertical DMOS struct ure and Supertex’s well-proven, silic on-gate manufacturing process. This com bination produces a device with the pow er handling capabilities of bipolar tra nsistors and the high input impedance a nd positive temperature coefficient inh erent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway a.
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