SN74LS109A
Dual JK Positive Edge−Triggered Flip−Flop
The SN74LS109A consists of two high speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop by simply connecting the J and K pins together.
MODE SELECT − TRUTH TABLE
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