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D-Type Flip-Flop. 74F823 Datasheet

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D-Type Flip-Flop. 74F823 Datasheet






74F823 Flip-Flop. Datasheet pdf. Equivalent






74F823 Flip-Flop. Datasheet pdf. Equivalent


74F823

Part

74F823

Description

9-Bit D-Type Flip-Flop



Feature


54F 74F823 9-Bit D-Type Flip-Flop Decem ber 1994 54F 74F823 9-Bit D-Type Flip- Flop General Description The ’F823 is a 9-bit buffered register It features Clock Enable and Clear which are ideal for parity bus interfacing in high perf ormance microprogramming systems The F823 is functionally and pin compatibl e with AMD’s Am29823 Features Y Y Y TRI-STATE outputs Clock.
Manufacture

National

Datasheet
Download 74F823 Datasheet


National 74F823

74F823; Enable and Clear Direct replacement for AMD’s Am29823 Commercial 74F823SPC Military Package Number N24C Package Description 24-Lead (0 300 Wide) Molde d Dual-In-Line 24-Lead (0 300 Wide) Cer amic Dual-In-Line 24-Lead (0 300 Wide) Molded Small Outline JEDEC 24-Lead Cerp ack 24-Lead Ceramic Chip Carrier Type C 54F823SDM (Note 2) 74F823SC (Note 1) 54F823FM (Note 2) 54.


National 74F823

F823LM (Note 2) Note 1 Devices also avai lable in 13 reel Use suffix e SCX J24F M24B W24C E28A Note 2 Military grade device with environmental and burn-in p rocessing Use suffix e SDMQB FMQB and L MQB Logic Symbols Connection Diagrams Pin Assignment for DIP SOIC and Flatpa k Pin Assignment for LCC TL F 9596–2 IEEE IEC TL F 9596 – 4 TL F 9596 3 TL F 9596–1 TRI-S.

Part

74F823

Description

9-Bit D-Type Flip-Flop



Feature


54F 74F823 9-Bit D-Type Flip-Flop Decem ber 1994 54F 74F823 9-Bit D-Type Flip- Flop General Description The ’F823 is a 9-bit buffered register It features Clock Enable and Clear which are ideal for parity bus interfacing in high perf ormance microprogramming systems The F823 is functionally and pin compatibl e with AMD’s Am29823 Features Y Y Y TRI-STATE outputs Clock.
Manufacture

National

Datasheet
Download 74F823 Datasheet




 74F823
December 1994
54F 74F823
9-Bit D-Type Flip-Flop
General Description
The ’F823 is a 9-bit buffered register It features Clock En-
able and Clear which are ideal for parity bus interfacing in
high performance microprogramming systems
The ’F823 is functionally and pin compatible with AMD’s
Am29823
Features
Y TRI-STATE outputs
Y Clock Enable and Clear
Y Direct replacement for AMD’s Am29823
Commercial
Military
Package
Number
Package Description
74F823SPC
N24C
24-Lead (0 300 Wide) Molded Dual-In-Line
54F823SDM (Note 2) J24F
24-Lead (0 300 Wide) Ceramic Dual-In-Line
74F823SC (Note 1)
M24B
24-Lead (0 300 Wide) Molded Small Outline JEDEC
54F823FM (Note 2)
W24C 24-Lead Cerpack
54F823LM (Note 2)
E28A
24-Lead Ceramic Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX
Note 2 Military grade device with environmental and burn-in processing Use suffix e SDMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9596–2
IEEE IEC
TL F 9596 – 3
TL F 9596 – 4
TL F 9596–1
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9596
RRD-B30M75 Printed in U S A




 74F823
Unit Loading Fan Out
Pin Names
Description
D0 – D8
OE
CLR
CP
EN
O0 – O8
Data Inputs
Output Enable Input
Clear
Clock Input
Clock Enable
TRI-STATE Outputs
UL
HIGH LOW
10 10
10 10
10 10
10 20
10 10
150 40 (33 3)
54F 74F
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b1 2 mA
20 mA b0 6 mA
b3 mA 24 mA (20 mA)
2



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