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CY2DP314

Cypress Semiconductor
Part Number CY2DP314
Manufacturer Cypress Semiconductor
Description 1 of 2:4 Differential Clock/Data Fanout Buffer
Published Nov 29, 2005
Detailed Description CY2DP314 1 of 2:4 Differential Clock/Data Fanout Buffer Features • Four ECL/PECL differential outputs • One ECL/PECL di...
Datasheet PDF File CY2DP314 PDF File

CY2DP314
CY2DP314

Overview
CY2DP314 1 of 2:4 Differential Clock/Data Fanout Buffer Features • Four ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs (CLKA) • One HSTL differential or single-ended inputs (CLKB) • Hot-swappable/-insertable • 50-ps output-to-output skew • 150-ps device-to-device skew • 400-ps propagation delay (typical) • 0.
8-ps RMS period jitter (max.
) • 1.
5-GHz operation (2.
7-GHz maximum toggle frequency) • PECL and HSTL mode supply range: VCC = 2.
5V± 5% to 3.
3V±5% with VEE = 0V • ECL mode supply range: VE E = –2.
5V± 5% to –3.
3V±5% with VCC = 0V • Industrial temperature range: –40°C to 85°C • 20-pin SSOP package • Temperature compensation like 100K ECL Functional Descri...


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