Frequency Synthesizers. LM7001J Datasheet

LM7001J Synthesizers. Datasheet pdf. Equivalent


Sanyo Semicon Device LM7001J
Ordering number : EN5262
NMOS LSI
LM7001J, 7001JM
Direct PLL Frequency Synthesizers
for Electronic Tuning
Features
• The LM7001J and LM7001JM are PLL frequency
synthesizer LSIs for tuners, making it possible to make
up high-performance AM/FM tuners easily.
• These LSIs are software compatible with the LM7000,
but do not include an IF calculation circuit.
• The FM VCO circuit includes a high-speed
programmable divider that can divide directly.
• Seven reference frequencies: 1, 5, 9, 10, 25, 50, and
100 kHz
• Band-switching outputs (3 bits)
• Controller clock output (400 kHz)
• Clock time base output (8 Hz)
• Serial input circuit for data input (using the CE, CL, and
DATA pins)
Package Dimensions
unit: mm
3006B-DIP16
[LM7001J]
unit: mm
3036B-MFP20
[LM7001JM]
SANYO: DIP16
SANYO: MFP20
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
D3095HA (OT) No. 5262-1/8


LM7001J Datasheet
Recommendation LM7001J Datasheet
Part LM7001J
Description Direct PLL Frequency Synthesizers
Feature LM7001J; Ordering number : EN5262 NMOS LSI LM7001J, 7001JM Direct PLL Frequency Synthesizers for Electronic.
Manufacture Sanyo Semicon Device
Datasheet
Download LM7001J Datasheet




Sanyo Semicon Device LM7001J
Pin Assignments
LM7001J, 7001JM
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Maximum supply voltage
Maximum input voltage
Maximum output voltage
Maximum output current
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
Conditions
VDD max
VIN1 max
VIN2 max
VOUT1 max
VOUT2 max
VOUT3 max
IOUT max
Pd max
VDD1, VDD2
CE, CL, DATA
Input pins other than VIN1
SYC
BO1 to BO3
Output pins other than VOUT1 and VOUT2
BO1 to BO3
Ta = 85°C: LM7001J (DIP16)
Ta = 85°C: LM7001JM (MFP20)
Topr
Tstg
Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V
Parameter
Symbol
Conditions
Supply voltage
Input high-level voltage
Input low-level voltage
Output voltage
Output current
Input frequency
Crystal element for guaranteed oscillation
VDD1
VDD2
VIH
VIL
VOUT1
VOUT2
IOUT
fIN1
fIN2
fIN3
fIN4
Xtal
VDD1, PLL circuit operating
VDD2, crystal oscillator time base
CE, CL, DATA
CE, CL, DATA
SYC
BO1 to BO3
BO1 to BO3, VDD = 4.5 to 6.5 V
XIN, sine wave, capacitor coupled
FMIN, sine wave, capacitor coupled*1, s*3 = 1
FMIN, sine wave, capacitor coupled*2, s*3 = 1
AMIN, sine wave, capacitor coupled, s*3 = 0
XIN to XOUT, CI 30
VIN1
XIN, sine wave, capacitor coupled
Input amplitude
VIN2
FMIN, sine wave, capacitor coupled
VIN3
AMIN, sine wave, capacitor coupled
Note: 1. fref = 25, 50, or 100 kHz
2. fref = Reference frequencies other than those for *1.
3. “s” refers to the control bit in the serial data.
Ratings
–0.3 to +7.0
–0.3 to +7.0
–0.3 to VDD + 0.3
–0.3 to +7.0
–0.3 to +13
–0.3 to VDD + 0.3
0 to 3.0
300
180
–40 to +85
–55 to +125
Unit
V
V
V
V
V
V
mA
mW
mW
°C
°C
Ratings
4.5 to 6.5
3.5 to 6.5
2.2 to 6.5
0 to 0.7
0 to 6.5
0 to 13
0 to 3.0
1.0 to 7.2 typ to 8.0
45 to 130
5 to 30
0.5 to 10
5.0 to 7.2 typ to 8.0
0.5 to 1.5
0.1 to 1.5
0.1 to 1.5
Unit
V
V
V
V
V
V
mA
MHz
MHz
MHz
MHz
MHz
Vrms
Vrms
Vrms
No. 5262-2/8



Sanyo Semicon Device LM7001J
LM7001J, 7001JM
Electrical Characteristics in the Allowable Operating Ranges
Parameter
Symbol
Conditions
min typ max Unit
Built-in feedback resistance
Input high-level current
Input low-level current
Output low-level voltage
Output off leakage current
Output high-level voltage
High-level 3-state
off leakage current
Rf1
Rf2
Rf3
IIH
IIL
VOL1
VOL2
VOL3
VOL4
IOFF1
IOFF2
VOH
IOFFH
XIN
FMIN
AMIN
CE, CL, DATA: VIN = 6.5 V
CE, CL, DATA: VIN = 0 V
FMIN, AMIN: IOUT = 0.5 mA
SYC: IOUT = 0.1 mA, *1
BO1 to BO3: IOUT = 2.0 mA
PD1, PD2: IOUT = 0.1 mA
SYC: VOUT = 6.5 V
BO1 to BO3: VOUT = 13 V
PD1, PD2: IOUT = –0.1 mA
PD1, PD2: VOUT = VDD
1.0
500
500
0.02
0.5 VDD
M
k
k
5.0 µA
5.0 µA
3.5 V
0.3 V
1.0 V
0.3 V
5.0 µA
3.0 µA
V
0.01
10.0
nA
Low-level 3-state
off leakage current
IOFFL
PD1, PD2: VOUT = 0 V
0.01
10.0
nA
Current drain
IDD1
IDD2
VDD1 + VDD2: *2
VDD2: PLL block stopped
25 40
2.0 3.5
Input capacitance
CIN FMIN
12
3
Note: 1. VDD = 3.5 to 6.5 V
2. With a 7.2 MHz crystal connected between XIN and XOUT, fIN2 = 130 MHz, VIN2 = 100 mVrms, other input pins at VSS, output pins open.
mA
mA
pF
Oscillator Circuit Example
Kinseki, Ltd.
HC43/U: 2114-84521 (1): CL = 10 pF, C1 = 15 (10 to 22) pF, C2 = 15 pF
HC43/U: 2114-84521 (2): CL = 16 pF, C1 = 22 (15 to 33) pF, C2 = 33 pF
Nihon Denpa Kogyou, Ltd.
NR-18: LM-X-0701: CL = 10 pF, C1 = 15 pF, C2 = 15 pF
Since the circuit constants in the crystal oscillator circuit depend on the crystal element used and the printed circuit board
pattern, we recommend consulting with the manufacturer of the crystal element concerning this circuit.
No. 5262-3/8







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