nanoDAC. AD5062 Datasheet

AD5062 nanoDAC. Datasheet pdf. Equivalent


Analog Devices AD5062
Fully Accurate 16-Bit VOUT nanoDAC
SPI Interface 2.7 V to 5.5 V, in an SOT-23
AD5062
FEATURES
Single 16-bit DAC, 1 LSB INL
Power-on reset to midscale or zero-scale
Guaranteed monotonic by design
3 power-down functions
Low power serial interface with Schmitt-triggered inputs
Tiny 8-lead SOT-23 package, low power
Fast settling time of 4 μs typically
2.7 V to 5.5 V power supply
Low glitch on power-up
Unbuffered voltage capable of driving 60 kΩ load
SYNC interrupt facility
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
FUNCTIONAL BLOCK DIAGRAM
VREF
VDD
POWER-ON
RESET
BUF
AD5062
DAC
REGISTER
REF(+)
DAC
VOUT
INPUT
CONTROL
LOGIC
POWER-DOWN
CONTROL LOGIC
RESISTOR
NETWORK
AGND
SYNC SCLK DIN
DACGND
Figure 1.
Table 1. Related Devices
Part No.
Description
AD5061
2.7 V to 5.5 V, 16-bit nanoDAC D/A,
4 LSBs INL, SOT-23.
AD5063
2.7 V to 5.5 V, 16-bit nanoDAC D/A,
1 LSB INL, MSOP.
AD5040/AD5060 2.7 V to 5.5 V, 14-/16-bit nanoDAC D/A,
1 LSB INL, SOT-23.
GENERAL DESCRIPTION
The AD5062, a member of ADI’s nanoDAC family, is a low
power, single 16-bit unbuffered voltage-out DAC that operates
from a single 2.7 V to 5.5 V supply. The part offers a relative
accuracy specification of ±1 LSB, and operation is guaranteed
monotonic with a ±1 LSB DNL specification. The part uses a
versatile 3-wire serial interface that operates at clock rates up
to 30 MHz, and is compatible with standard SPI®, QSPI™,
MICROWIRE™, and DSP interface standards. The reference for
the AD5062 is supplied from an external VREF pin. A reference
buffer is also provided on-chip. The part incorporates a power-
on reset circuit that ensures the DAC output powers up to zero
scale or mid-scale and remains there until a valid write takes
place to the device. The part contains a power-down feature
that reduces the current consumption of the device to typically
300 nA at 5 V and provides software-selectable output loads
while in power-down mode. The part is put into power-down
mode over the serial interface. Total unadjusted error for the
part is <0.8 mV.
This part exhibits very low glitch on power-up.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
PRODUCT HIGHLIGHTS
1. Available in a tiny 8-lead SOT-23 package.
2. 16-bit accurate, 1 LSB INL.
3. Low glitch on power-up.
4. High speed serial interface with clock speeds up to 30 MHz.
5. Three power-down modes available to the user.
6. Reset to known output voltage (zero-scale or mid-scale).
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2005–2009 Analog Devices, Inc. All rights reserved.


AD5062 Datasheet
Recommendation AD5062 Datasheet
Part AD5062
Description nanoDAC
Feature AD5062; Fully Accurate 16-Bit VOUT nanoDAC™ SPI Interface 2.7 V to 5.5 V, in an SOT-23 AD5062 FEATURES Sing.
Manufacture Analog Devices
Datasheet
Download AD5062 Datasheet




Analog Devices AD5062
AD5062
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
Functional Block Diagram .............................................................. 1 
General Description ......................................................................... 1 
Product Highlights ........................................................................... 1 
Revision History ............................................................................... 2 
Specifications..................................................................................... 3 
Timing Characteristics..................................................................... 5 
Absolute Maximum Ratings............................................................ 6 
ESD Caution.................................................................................. 6 
Pin Configuration and Function Descriptions............................. 7 
Typical Performance Characteristics ............................................. 8 
Terminology .................................................................................... 13 
Theory of Operation ...................................................................... 14 
DAC Architecture....................................................................... 14 
REVISION HISTORY
5/09—Rev. 0 to Rev. A
Changes to Figure 43...................................................................... 17
7/05—Revision 0: Initial Version
Reference Buffer ......................................................................... 14 
Serial Interface ............................................................................ 14 
Input Shift Register .................................................................... 14 
SYNC Interrupt .......................................................................... 14 
Power-On to Midscale or Zero Scale....................................... 15 
Software Reset............................................................................. 15 
Power-Down Modes .................................................................. 15 
Microprocessor Interfacing....................................................... 15 
Applications..................................................................................... 17 
Choosing a Reference for the AD5062.................................... 17 
Bipolar Operation Using the AD5062 ..................................... 17 
Using AD5062 with a Galvanically Isolated Interface Chip . 18 
Power Supply Bypassing and Grounding................................ 18 
Outline Dimensions ....................................................................... 19 
Ordering Guide .......................................................................... 19 
Rev. A | Page 2 of 20



Analog Devices AD5062
AD5062
SPECIFICATIONS
VDD = 5.5 V, VREF = 4.096 V, RL = Unloaded, CL = 22 pF to GND; TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE
Resolution
Relative Accuracy (INL)2
Total Unadjusted Error (TUE)
Differential Nonlinearity (DNL)
Gain Error
Gain Error Temperature Coefficient
Offset Error
Offset Error Temperature Coefficient
Full-Scale Error
OUTPUT CHARACTERISTICS3
Output Voltage Range
Output Voltage Settling Time
Output Noise Spectral Density
Output Voltage Noise
Digital-to-Analog Glitch Impulse
Digital Feedthrough
DC Output Impedance (Normal)
DC Output Impedance (Power-Down)
(Output Connected to 1 kΩ Network)
(Output Connected to 100 kΩ Network)
REFERENCE INPUT/ OUTPUT
VREF Input Range2
Input Current (Power-Down)
Input Current (Normal)
DC Input Impedance
LOGIC INPUTS
Input Current4
VIL, Input Low Voltage
VIH, Input High Voltage
Pin Capacitance
A,B Grade1
Min Typ
Max
Unit
Test Conditions/Comments
16 Bits
±0.5 ±1
LSB
−40°C to +85°C, B grade
±0.5 ±2
−40°C to +85°C, A grade
±500 ±800
μV
−40°C to +85°C, B grade
±500 ±800
−40°C to +85°C, A grade
±0.5 ±1
LSB
Guaranteed monotonic
−40°C to +85°C, B grade
±0.5 ±1
Guaranteed monotonic
−40°C to +85°C, A grade
±0.01 ±0.02 % of FSR
TA = −40°C to +85°C B grade
±0.01 ±0.02
TA = −40°C to +85°C A grade
1 ppm of FSR/°C
±0.025 ±0. 05 mV
TA = −40°C to + 85°C, B grade
±0.025 ±0. 05
TA = −40°C to + 85°C, A grade
0.5 μV/°C
±500 ±800
μV
All 1s loaded to DAC register, B grade
TA = −40°C to +85°C
±500 ±800
All 1s loaded to DAC register, A grade
TA = −40°C to +85°C
0
4
VREF V
μs
24 nV/Hz
6 μV p-p
2 nV-s
0.1 nV-s
8
Unipolar operation
¼ scale to ¾ scale code transition to
±1LSB.
DAC code = midscale, 1 kHz
DAC code = midscale, 0.1 to 10 Hz
bandwidth
1 LSB change around major carry
Output impedance tolerance ±20%
1 kΩ Output impedance tolerance ±20%
100 kΩ Output impedance tolerance ±20%
2 VDD − 50 mV
±0.1 μA
±0. 5
μA
1 MΩ
Zero-scale loaded
Bipolar/unipolar operation
±1
2.0
1.8
4
±2
0.8
0.8
μA
V
V
pF
VDD = 4.5 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 2.7 V to 5.5 V
VDD = 2.7 V to 3.6 V
Rev. A | Page 3 of 20







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