RA1133J IMAGE SENSOR Datasheet

RA1133J Datasheet, PDF, Equivalent


Part Number

RA1133J

Description

FULL FRAME CCD IMAGE SENSOR

Manufacture

PerkinElmer Optoelectronics

Total Page 8 Pages
Datasheet
Download RA1133J Datasheet


RA1133J
Imaging
Imaging Product Line
RA1133J Full Frame CCD Image Sensor
24 µm square pitch, 1100 x 330 pixel configuration
www.DataSheet4U.com
Description
MPP Operation
The RA1133J is a full frame CCD
sensor with reset capabilities designed
specifically for use in spectroscopy,
biomedical imaging and related scientific
imaging applications. The package for
the array is designed with an integrated
two stage thermoelectric cooler. This
enables the device to be run 40° C
below ambient temperature, -15° C
when compared to room temperature.
Its combination of very low noise and
low dark current make it ideal for low
light, high dynamic range and high
resolution applications.
A major source of dark current in
devices such as this originates in
surface states at the Si-SiO2 interface.
A unigue design and process enables
the RA1133J to be run in "multi-pinned
phase" or MPP mode of operation.
This helps eliminate dark current
generation in the interface surface
states. By holding the vertical clocks
at negative potential during integration
and horizontal signal readout, the
surface will not be depleted and the
surface state will not generate dark
current.
The imager is structured with a single
output register at one end of the imaging
columns. A lateral reset drain is located
adjacent to this readout register which
enables the dumping of accumulated
charge from the array. Two phase clocks
are needed to drive the readout register.
Three phase clocks are needed to drive
imaging cells. The array is available in
a 30-pin metal package with an integrated
TE cooler as shown in Figure 1. Package
dimensions are shown in Figure 8.
Caution: While the RA1133J imagers have been
designed to resist electrostatic discharge (ESD),
they can be damaged from such discharges.
Always observe proper ESD precautions when
handling and storing these sensors.
Features
363,000 picture elements (pixels) in
a 1100 x 330 configuration
24 µm square pixels
2-phase buried channel process
On-chip amplifier for low noise and
high speed readout
Dynamic range greater than 25,000:1
On-chip temperature sensor
Two stage TE cooler integrated into
the package
Hermetically sealed
100% fill factor
10 MHz data rate
www.perkinelmer.com/opto
DSP-303.01C- 8/2002W Page 1

RA1133J
Full Frame CCD Sensor
Imaging Area
The imaging area is an array of 1100
columns (vertical CCD shift registers).
Each column has 330 picture elements.
The pixel size is 24 µm by 24 µm. The
total imaging area is 26.4 mm by 7.92 mm.
Typical spectral response as a function
of wavelength is shown in Figure 2.
This is for both the standard array and
an array coated with lumogen, an UV
phosphor that extends the range of the
detector into the ultraviolet.
In the vertical direction, each pixel
corresponds to one stage (three electrodes)
of the shift register. The three electrode
groups are driven by three-phases (Ø1V -
Ø3V) brought in from both edges of the
array to improve clock electrode response
time. Charge packets (imaging data) in the
vertical register can be shifted to the hori-
zontal readout by clocking the three phases
(Ø1V, Ø2V and Ø3V). A transfer gate (ØTG) is
provided at the interface of the vertical reg-
ister. The transfer gate controls the transferring
of charge into the horizontal readout register.
Charge flow is from Ø3 gate of the vertical
shift register into Ø1 gate of the horizontal
readout register. The control function is
performed by pulsing the transfer gate high
to permit the charge flow from the vertical
register into the horizontal register for
readout. When the potential of the vertical
register electrodes is held steady, a potential
well is created beneath the storage gates
Ø1V and Ø2V. When an image impinges
on the sensing area, an electrical signal of
the scene will be collected in the potential
well during this integration period.
Following the integration interval, the
collected charge (signal) in the array can
be read out as a full frame image by
transferring the charge, one or more rows at
a time, into the horizontal shift register.
From here, the charge can be shifted serially
to the output amplifier. A mechanical
shutter is needed to shield the array from
incident light during the readout process.
A strobe illumination could be used to
stimulate the shuttered mode of operation.
Image smearing degrades the performance,
particularly at low data rates, unless
shuttering is provided.
Horizontal Register
The horizontal shift register is driven by
two phase clocks (Ø1H and Ø2H). The
horizontal register has 1100 stages plus
an extension of 35 stages ( 3 dummy stages,
16 leading isolation stages and 16 trailing
isolation stages). As a result, amplifier
power is dissipated more efficiently and
dark current generation by localized heating
is minimized.
Figure 1. Pinout Configuration
Ø1V
Ø3V
ØTG2
VLD
ØLG2
LS
TEMP+
TEMP-
VSUB
ØTG2
Ø3V
Ø1V
Ø2V
ØTG1
ØSG
+
-
Ø2V
ØTG1
N/C
VSUB
LS
Ø1H
Ø2H
ØLG1
VDD
VOUT
VLD
VSS
VRD
ØRG
VOG
Figure 2. Quantum Efficiency
60
50
40
30
20
10
0
200 300 400 500 600 700 800 900
Wavelength, nm
Figure 3. Functional Diagram
Ø1V
Ø2V
Ø3V
ØTG
Ø1H
Ø2H
ØLG
VLD
Imaging Area
1100 (H) x 330 (V) - active pixels
Horizontal CCD Shift
1000 1100
Output Buffer
www.perkinelmer.com/opto
DSP-303.01C - 8/2002W Page 2


Features D A T A S H E E T Imaging Imaging Prod uct Line RA1133J Full Frame CCD Image Sensor 24 µm square pitch, 1100 x 330 pixel configuration www.DataSheet4U.co m Description The RA1133J is a full fr ame CCD sensor with reset capabilities designed specifically for use in spectr oscopy, biomedical imaging and related scientific imaging applications. The pa ckage for the array is designed with an integrated two stage thermoelectric co oler. This enables the device to be run 40° C below ambient temperature, -15 C when compared to room temperature. Its combination of very low noise and l ow dark current make it ideal for low l ight, high dynamic range and high resol ution applications. MPP Operation A ma jor source of dark current in devices s uch as this originates in surface state s at the Si-SiO2 interface. A unigue de sign and process enables the RA1133J to be run in "multi-pinned phase" or MPP mode of operation. This helps eliminate dark current generation in the interface surface states. By holdi.
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