Digital Synthesizer. AD9858 Datasheet

AD9858 Synthesizer. Datasheet pdf. Equivalent

Part AD9858
Description 1 GSPS Direct Digital Synthesizer
Feature 1 GSPS Direct Digital Synthesizer AD9858 FEATURES 1 GSPS internal clock speed Up to 2 GHz input clo.
Manufacture Analog Devices
Datasheet
Download AD9858 Datasheet



AD9858
1 GSPS Direct Digital Synthesizer
AD9858
FEATURES
1 GSPS internal clock speed
Up to 2 GHz input clock (selectable divide-by-2)
Integrated 10-bit DAC
Excellent phase noise and SFDR
32-bit programmable frequency register
Simplified 8-bit parallel and SPI serial control interface
Automatic frequency sweeping capability
4 frequency profiles
3.3 V power supply
Power dissipation: 2 W typical
Integrated programmable charge pump and phase
frequency detector with fast lock circuit
Isolated charge pump supply up to 5 V
Integrated 2 GHz mixer
APPLICATIONS
VHF/UHF LO synthesis
Tuners
Instrumentation
Agile clock synthesis
Cellular base station hopping synthesizers
Radars
SONET/SDH clock synthesis
GENERAL DESCRIPTION
The AD9858 is a direct digital synthesizer (DDS) featuring a
10-bit digital-to-analog converter (DAC) operating up to 1 GSPS.
The AD9858 uses advanced DDS technology coupled with an
internal high speed, high performance DAC to form a digitally
programmable, complete high frequency synthesizer capable of
generating a frequency-agile analog output sine wave at up to
400 MHz. The AD9858 is designed to provide fast frequency
hopping and fine tuning resolution (32-bit frequency tuning
word). The frequency tuning and control words are loaded into
the AD9858 via parallel (8-bit) or serial loading formats. The
AD9858 contains an integrated charge pump (CP) and phase
frequency detector (PFD) for synthesis applications requiring
the combination of a high speed DDS along with phase-locked
loop (PLL) functions. An analog mixer is also provided on chip
for applications requiring the combination of a DDS, PLL, and
mixer, such as frequency translation loops and tuners. The AD9858
also features a divide-by-2 on the clock input, allowing the external
reference clock to be as high as 2 GHz.
The AD9858 is specified to operate over the extended industrial
temperature range of –40°C to +85°C.
DIV
DIV
PD
CP
CPISET
FUNCTIONAL BLOCK DIAGRAM
LO LO
IF IF
RF RF
÷M
÷N
CHARGE
PUMP
PHASE
DETECTOR
DIGITAL PLL
ANALOG
MULTIPLIER
FREQUENCY ACCUMULATOR
PHASE ACCUMULATOR
AD9858
32
15
15
PHASE-TO-
AMPLITUDE
10
DAC
CONVERSION
DACISET
IOUT
IOUT
14
RESET
32
32
TIMING AND CONTROL LOGIC
CONTROL REGISTERS
POWER-
DOWN
LOGIC
÷8
PS0 PS1 I/O PORT
(SER/PAR)
Figure 1.
SYSCLK
M
U
X
÷2
FUD
SYNCLK
REFCLK
REFCLK
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2003–2009 Analog Devices, Inc. All rights reserved.



AD9858
AD9858* Product Page Quick Links
Last Content Update: 11/01/2016
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Evaluation Kits
• AD9858 Evaluation Board
Documentation
Application Notes
• AN-1389: Recommended Rework Procedure for the Lead
Frame Chip Scale Package (LFCSP)
• AN-237: Choosing DACs for Direct Digital Synthesis
• AN-280: Mixed Signal Circuit Technologies
• AN-342: Analog Signal-Handling for High Speed and
Accuracy
• AN-345: Grounding for Low-and-High-Frequency Circuits
• AN-419: A Discrete, Low Phase Noise, 125 MHz Crystal
Oscillator for the AD9850
• AN-423: Amplitude Modulation of the AD9850 Direct
Digital Synthesizer
• AN-543: High Quality, All-Digital RF Frequency
Modulation Generation with the ADSP-2181 and the
AD9850 DDS
• AN-557: An Experimenter's Project:
• AN-587: Synchronizing Multiple AD9850/AD9851 DDS-
Based Synthesizers
• AN-605: Synchronizing Multiple AD9852 DDS-Based
Synthesizers
• AN-621: Programming the AD9832/AD9835
• AN-632: Provisionary Data Rates Using the AD9951 DDS
as an Agile Reference Clock for the ADN2812 Continuous-
Rate CDR
• AN-769: Generating Multiple Clock Outputs from the
AD9540
• AN-772: A Design and Manufacturing Guide for the Lead
Frame Chip Scale Package (LFCSP)
• AN-823: Direct Digital Synthesizers in Clocking
Applications Time
• AN-837: DDS-Based Clock Jitter Performance vs. DAC
Reconstruction Filter Performance
• AN-851: A WiMax Double Downconversion IF Sampling
Receiver Design
• AN-927: Determining if a Spur is Related to the DDS/DAC
or to Some Other Source (For Example, Switching
Supplies)
• AN-939: Super-Nyquist Operation of the AD9912 Yields a
High RF Output Signal
• AN-953: Direct Digital Synthesis (DDS) with a
Programmable Modulus
Data Sheet
• AD9858: 1 GSPS Direct Digital Synthesizer Data Sheet
Product Highlight
• Introducing Digital Up/Down Converters: VersaCOMM™
Reconfigurable Digital Converters





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