Type FET. 2SK4059TV Datasheet

2SK4059TV FET. Datasheet pdf. Equivalent

Part 2SK4059TV
Description Silicon N-Channel MOS Type FET
Feature 2SK4059TV TOSHIBA Field Effect Transistor Silicon N Channel Junction Type 2SK4059TV For ECM • Appli.
Manufacture Toshiba Semiconductor
Datasheet
Download 2SK4059TV Datasheet

2SK4059TV TOSHIBA Field Effect Transistor Silicon N Channel 2SK4059TV Datasheet
Recommendation Recommendation Datasheet 2SK4059TV Datasheet




2SK4059TV
2SK4059TV
For ECM
TOSHIBA Field Effect Transistor Silicon N Channel Junction Type
2SK4059TV
Application for Ultra-compact ECM
1.2±0.05
0.8±0.05
Unit: mm
Absolute Maximum Ratings (Ta=25°C)
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Characteristic
Gate-Drain voltage
Gate Current
Drain power dissipation (Ta = 25°C)
Junction Temperature
Storage temperature range
Symbol
VGDO
IG
PD
Tj
Tstg
Rating
-20
10
100
125
55~125
Unit
V
mA
mW
°C
°C
Note:
Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e. operating
temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba
Semiconductor Reliability Handbook (“Handling
Precautions”/“Derating Concept and Methods”) and individual
reliability data (i.e. reliability test report and estimated failure rate,
etc).
1
23
VESM2
1.Drain
2.Source
3.Gate
JEDEC
-
JEITA
-
TOSHIBA
2-1H1A
Weight: 0.8mg (typ.)
IDSS CLASSIFICATION
A-Rank 140~240µA
B-Rank 210~350µA
BK-Rank 210~400µA
C-Rank 320~500µA
Marking
8
Type Name
Top Gate
Lot Code
IDSS Classification Symbol
A :A-Rank
B :B-Rank BK-Rank
C :C-Rank
Equivalent Circuit
D
G
S
Precaution
There is a metal plate on the top of package, which has the same electrical potential as the Gate terminal. Don’t use
it as a terminal.
1 2007-11-01



2SK4059TV
Electrical Characteristics (Ta=25°C)
2SK4059TV
Characteristic
Symbol
Test Condition
Min Typ. Max Unit
A 140
Drain Current
IDSS VDS = 2 V, VGS = 0
B 210
BK 210
C 320
A 125
Drain Current
ID VDD = 2 V, RL= 2.2kΩ,Cg = 5pF
B 190
BK 190
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Gate-Source Cut-off Voltage VGS(OFF) VDS = 2 V, ID = 1μA
Forward transfer admittance
|Yfs| VDS = 2 V,VGS = 0V
Gate-Drain Voltage
V(BR)GDO IG=-10μA
Input capacitance
Ciss VDS = 2 V, VGS = 0, f = 1 MHz
C 290
-0.1
1.35
-20
A -1.2
Voltage Gain
Gv VDD = 2V, RL= 2.2kΩ,Cg = 5pF, f = 1kHz,vin=100mV
B -0.2
BK -0.2
C +0.5
Delta Voltage Gain
DGv(f)
VDD = 2V, RL= 2.2kΩ,Cg = 5pF,f = 1kHz~100Hz,vin=100mV
A
Delta Voltage Gain
DGv(V)
VDD = 2V~1.5V, RL= 2.2kΩ,Cg = 5pF,f = 1kHz,
vin=100mV
B
BK
C
A
Noise Voltage
B
VN VDD = 2V, RL= 1kΩ,Cg = 10pF,Gv=80dB, A-Curve Filter
BK
C
A
Total Harmonic Distortion
THD VDD = 2V, RL= 2.2kΩ,Cg = 5pF, f = 1kHz, vin=50mV
B
BK
C
Time Output Stability
tos VDD = 2V, RL= 2.2kΩ,Cg = 5pF
1.85
4.0
+0.9
+1.4
+1.7
+1.8
0
-0.6
-0.8
-1.1
-1.4
33
38
40
42
1.3
0.6
0.5
0.1
100
240
350
400
500
260
370
420
500
-1.0
-1
-1.1
-1.7
-2.0
-3.2
75
80
85
90
200
µA
µA
V
mS
V
pF
dB
dB
dB
mV
%
ms
Time Output Stability Test Method
a) TEST CIRCUIT
b) TEST SIGNAL
VDD=2.0V
Vout
VDD
2V
0V
Vout
VDD-ID*RL
0V
50%
90%
tos
2 2007-11-01





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