CMOS Gate Array
Description
2'&6;;[[
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$0,+* PLFURQ &026 *DWH $UUD\
Description ODCSXXxx is a family of 4 to 24 mA, non-inverting, CMOS-level, output buffer pieces with controlled slew rate outputs.
Logic Symbol
Truth Table
ODCSXXxx
SL
A PADM
A PADM LL HH
HDL Syntax Verilog .................... ODCSXXxx inst_name (PADM, A); VHDL...................... inst_name: ODCSXXxx por...
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