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74AUP2G34

Part Number	74AUP2G34
Manufacturer	nexperia
Description	Low-power dual buffer
Published	Jul 25, 2019
Detailed Description	74AUP2G34 Low-power dual buffer Rev. 8 — 31 January 2022 Product data sheet 1. General description The 74AUP2G34 is a ...
Datasheet	74AUP2G34 PDF File

Overview

74AUP2G34 Low-power dual buffer Rev.
8 — 31 January 2022 Product data sheet 1.
General description The 74AUP2G34 is a dual buffer.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device ensures very low static and dynamic power consumption across the entire VCC range from 0.
8 V to 3.
6 V.
This device is fully specified for partial power down applications using IOFF.
The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
2.
Features and benefits • Wide supply voltage range from 0.
8 V to 3.
6 V • CMOS low power dissipation • High noise immunity • Overvoltage tolerant inputs to 3.
6 V • Low noise overshoot and undershoot < 10 % of VCC • IOFF circuitry provides partial Power-down mode operation • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Low static power consumption; ICC = 0.
9 μA (maximum) • Complies with JEDEC standards: • JESD...

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