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74ALVT16652

NXP
Part Number 74ALVT16652
Manufacturer NXP
Description 2.5V/3.3V 16-bit bus transceiver/register
Published Apr 3, 2005
Detailed Description INTEGRATED CIRCUITS 74ALVT16652 2.5V/3.3V 16-bit bus transceiver/register (3-State) Product specification Supersedes da...
Datasheet PDF File 74ALVT16652 PDF File

74ALVT16652
74ALVT16652

Overview
INTEGRATED CIRCUITS 74ALVT16652 2.
5V/3.
3V 16-bit bus transceiver/register (3-State) Product specification Supersedes data of 1996 Aug 13 IC23 Data Handbook 1998 Feb 13 Philips Semiconductors Philips Semiconductors Product specification 2.
5V/3.
3V 16-bit bus transceiver/register (3-State) 74ALVT16652 FEATURES • 16–bit bus interface • 5V I/O Compatible • 3-State buffers • Output capability: +64mA/-32mA • TTL input and output switching levels • Input and output interface capability to systems at 5V supply • Bus-hold data inputs eliminate the need for external pull-up • Live insertion/extraction permitted • Power-up reset • Power-up 3-State • No bus current loading when output is tied to 5V bus • Latch-up protection exceeds 500mA per JEDEC JC40.
2 Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model resistors to hold unused inputs DESCRIPTION The 74ALVT16652 is a high-performance BiCMOS product designed for VCC operation at 2.
5V or 3.
3V with I/O compatibility up to 5V.
The device can be used as two 8-bit transceivers or one 16-bit transceiver.
Complimentary output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions.
Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred.
A Low-input level selects real-time data, and a High input level selects stored data.
The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data.
Data on the A or B bus, or both, can be stored in the internal flip-flops by Low-to-High transitions at the appropriate clock (CPAB or CPBA) inputs regardless of the levels on the select-control or output-enable inputs.
When SAB and SBA are in real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA.
In this configuration, each output reinforces its inp...


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