MC100LVEP111
2.5V / 3.3V 2:1:10 Differential ECL/PECL/HSTL Clock Driver
Description The MC100LVEP111 is a low skew 2:1:10 differential driver, designed
with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or singleāended (if the VBB output is used). HSTL inputs can be used ...