DatasheetsPDF.com

PLL650-05

PhaseLink

Low EMI Network LAN Clock


Description
FEATURES w w w Full CMOS output swing with 40-mA output drive capability. 25-mA output drive at TTL level. Advanced, low power, sub-micron CMOS processes. 25MHz fundamental crystal or clock input. 3 fixed outputs of 25MHz, 75Mhz and 125Mhz with output disable SDRAM selectable frequencies of 105, 83.3, 140MHz (Double Drive Strength). Sp...



PhaseLink

PLL650-05

File Download Download PLL650-05 Datasheet


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)