DatasheetsPDF.com

HD74AC107

Part Number	HD74AC107
Manufacturer	Hitachi Semiconductor
Description	Dual JK Flip-Flop (with Separate Clear and Clock)
Published	Mar 23, 2005
Detailed Description	HD74AC107/HD74ACT107 Dual JK Flip-Flop (with Separate Clear and Clock) Description The HD74AC107/HD74ACT107 dual JK mas...
Datasheet	HD74AC107 PDF File

Overview

HD74AC107/HD74ACT107 Dual JK Flip-Flop (with Separate Clear and Clock) Description The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop.
Inputs to the master section are controlled by the clock pulse.
The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections.
The sequence of operation is as follows: 1) isolate slave from master; 2) enter information from J and K inputs to master; 3) disable J and K inputs; 4) transfer information from master to slave.
Features • Outputs Source/Sink 24 mA • HD74ACT107 has TTL-Compatible Inputs Pin Arrangement J1 1 Q1 2 Q1 3 K1 4 Q2 5 Q2 6 GND 7 (Top view) ...

Similar Datasheet

HD74AC107 Dual JK Flip-Flop (with Separate Clear and Clock) - Hitachi Semiconductor
HD74AC107 Dual JK Flip-Flop - Renesas
HD74AC112 Dual JK Negative Edge-Triggered Flip-Flop - Hitachi Semiconductor
HD74AC112 Dual JK Negative Edge-Triggered Flip-Flop - Renesas
HD74AC123A Dual Retriggerable Resettable Multivibrator - Hitachi Semiconductor
HD74AC123A Dual Retriggerable Resettable Multivibrator - Renesas
HD74AC125 Quad Buffer/Line Driver with 3-State Output - Hitachi Semiconductor
HD74AC125 Quad Buffer/Line Driver - Renesas
HD74AC126 Quad Buffer/Line Driver with 3-State Output - Hitachi Semiconductor
HD74AC126 Quad Buffer/Line Driver - Renesas

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)