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ICS8543I

Part Number	ICS8543I
Manufacturer	Integrated Device Technology
Description	Differential-to-LVDS Fanout Buffer
Published	Jan 27, 2016
Detailed Description	Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer ICS8543I DATA SHEET General Description The ICS8543I is a low sk...
Datasheet	ICS8543I PDF File

Overview

Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer ICS8543I DATA SHEET General Description The ICS8543I is a low skew, high performance 1-to-4 Differential-to-LVDS Clock Fanout Buffer.
Utilizing Low Voltage Differential Signaling (LVDS) the ICS8543I provides a low power, low noise, solution for distributing clock signals over controlled impedances of 100.
The ICS8543I has two selectable clock inputs.
The CLK, nCLK pair can accept most standard differential input levels.
The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels.
The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin.
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