| No. | Part # | Manufacturer | Description | Datasheet |
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ST Microelectronics |
N-CHANNEL MOSFET OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied fr |
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ST Microelectronics |
N-CHANNEL MOSFET TRANSISTOR Insulation Withstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature o w w w Parameter t a .D S a e h INTERNAL SCHEMATIC DIAGRAM U 4 t e 1 2 .c m o 1 3 2 ISOWATT220 Value STP36N06 60 60 ± 20 36 25 144 120 0.8 -6 |
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ST Microelectronics |
N-CHANNEL 60V - 0.032ohm - 36A - TO-220/TO-220FP STripFET POWER MOSFET Size™ " strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS HIGH |
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ST Microelectronics |
N-CHANNEL Power MOSFET Order codes VDS RDS(on) max. STB3NK60ZT4 STD3NK60Z-1 STD3NK60ZT4 600 V 3.6 Ω STP3NK60Z STP3NK60ZFP • Extremely high dv/dt capability • 100% avalanche tested • Gate charge minimized • Very low intrinsic capacitance • Zener-protected ID 2.4 A |
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STMicroelectronics |
N-channel Power MOSFET Type STF3NK100Z STP3NK100Z STD3NK100Z ■ ■ ■ ■ ■ VDSS 1000V 1000V 1000V RDS(on) Max < 6Ω < 6Ω < 6Ω ID 2.5A 2.5A 2.5A PTOT 25W 90W 90W TO-220 1 2 1 3 2 3 TO-220FP Extremely high dv/dt capability 3 100% avalanche tested Gate charge minimized Ve |
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STMicroelectronics |
N-CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR g Junction Temperature o o Value STP3N100FI 1000 1000 ± 20 3.5 2 14 100 0.8 -65 to 150 150 2 1.2 14 40 0.32 2000 Unit V V V A A A W W/o C V o o C C ( •) Pulse width limited by safe operating area December 1996 1/10 www.DataSheet.in STP3N100 |
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STMicroelectronics |
N-CHANNEL POWER MOSFET Order code VDS RDS(on) max. ID STP36N60M6 STW36N60M6 600 V 99 mΩ 30 A 3 2 1 TO-220 3 2 1 TO-247 x Reduced switching losses x Lower RDS(on) x area vs previous generation x Low gate input resistance x 100% avalanche tested x Zener-protected F |
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STMicroelectronics |
TRISIL BIDIRECTIONAL CROWBAR PROTECTION. VOLTAGE RANGE: FROM 62 V TO 270 V. HOLDING CURRENT : IH = 150 mA min. REPETITIVE PEAK PULSE CURRENT : IPP = 30 A, 10/1000 µs. JEDEC REGISTERED PACKAGE OUTLINE DESCRIPTION The TP30-xxx series has been designed to prot |
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ST Microelectronics |
STP36NE06 Size™ " strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS HIGH |
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ST Microelectronics |
N-CHANNEL MOSFET OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied fr |
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STMicroelectronics |
N-CHANNEL Power MOSFET TAB TO-220 1 23 D(2, TAB) Order code VDS STP3NK80Z 800 V • 100% avalanche tested • Gate charge minimized • Very low intrinsic capacitance • Zener-protected Applications RDS(on) max. 4.5 Ω ID 2.5 A • Switching applications G(1) Descriptio |
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STMicroelectronics |
N-Channel MOSFET TAB TO-220 1 23 Order code VDS RDS(on) max. ID STP3NK90Z 900 V 4.8 Ω 3A • 100% avalanche tested • Gate charge minimized • Very low intrinsic capacitance • Zener-protected D(2, TAB) Applications • Switching applications G(1) Description |
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STMicroelectronics |
STP3NA80FI P tot V ISO T stg Tj Drain-source Voltage (V GS = 0) Drain-gate Voltage (RG S = 20 k Ω ) Gate-source Voltage Drain Current (continuous) at T c = 25 oC Drain Current (continuous) at T c = 100 oC Drain Current (pulsed) Total Dissipation at Tc = 25 C De |
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STMicroelectronics |
N-channel Power MOSFET TAB Order code VDS RDS(on)max. ID Package TAB t(s) 3 1 c D2PAK TO-220 1 23 Produ D(2, TAB) olete G(1) - Obs S(3) AM01475V1 roduct(s) Product status link te P STB3N62K3 Obsole STP3N62K3 STB3N62K3 STP3N62K3 620 V 2.5 Ω • 100% avalanch |
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ST Microelectronics |
STP3NB80 ID I DM ( • ) P tot dv/dt( 1 ) VISO Tstg Tj Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω ) Gate-source Voltage Drain Current (continuous) at T c = 25 o C Drain Current (pulsed) Total Dissipation at T c = 25 o C Derating Facto |
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STMicroelectronics |
N-channel Power MOSFET TAB 3 2 1 TO-220 Figure 1. Internal schematic diagram ' 7$% Order code STP310N10F7 VDS RDS(on) max. ID 100 V 2.7 mΩ 180 A • Ultra low on-resistance • 100% avalanche tested Applications • Switching applications Description This device utiliz |
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STMicroelectronics |
STP3NA90FI ge T emperature Tj Max Operating Junction Temperature ( •)Pulse width limited by safe operating area March 1996 Value STP3NA90 S TP3NA 90F I 900 900 ± 30 3 1.9 2 1.2 12 12 100 40 1.25 0 .3 2 - 2000 -65 to 150 150 Unit V V V A A A W W/ |
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STMicroelectronics |
STP3NA60 at Tc = 25 oC ID Drain Current (continuous) at Tc = 100 oC IDM( •) Drain Current (pulsed) Ptot Total Dissipation at Tc = 25 oC Derating Factor VISO Insulation Withstand Voltage (DC) Tstg Storage Temperature Tj Max. Operating Junction Temperature ( •) |
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STMicroelectronics |
N-channel Power MOSFET TAB 3 2 1 TO-220 Order code STP3NK50Z VDS RDS(on)max. ID 500 V 3.3 Ω 2.3 A • Extremely high dv/dt capability • ESD improved capability • 100% avalanche tested • Gate charge minimized • Zener-protected PTOT 45 W Figure 1. Internal schematic diag |
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STMicroelectronics |
N-Channel Power MOSFET Order code VDS RDS(on) max. ID STP3NK90ZFP 900 V 4.8 Ω 3A 3 2 1 TO-220FP D(2) • 100% avalanche tested • Gate charge minimized • Very low intrinsic capacitance • Zener-protected Applications G(1) • Switching applications Description Thi |
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