74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Rev.
8 — 24 January 2022 Product data sheet 1.
General description The 74AUP1G79 is a single positive-edge triggered D-type flip-flop.
Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.
.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device ensures very low static and dynamic power consumption across the entire VCC range from 0.
8 V to 3.
6 V.
This device is fully specified for partial power down applications using IOFF.
The IOFF circuitry disables the output, ...

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