NPN/PNP Silicon Digital Transistor Array Preliminary data
SEMD13 NPN/PNP Silicon Digital Transistor Array Preliminary data • Switching circuit, inverter, interface circuit, driver circuit • Two (galvanic) internal isolated NPN/PNP Transistors in one package • Built in bias resistor (R1=4.7kΩ, R2 =47kΩ) Tape loading orientation Top View 3 2 1 4 5 3 6 1 2 Marking on SOT666 package (for example W R) corresponds to p...
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