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S T S 8205
S amHop Microelectronics C orp.
J un,08 2005 ver 1.
4
Dual N-C hannel E nhancement Mode Field E ffect
Transistor
P R ODUC T S UMMAR Y
V DS S
20V
F E AT UR E S
( mW ) Max
ID
4A
R DS (ON)
S uper high dense cell design for low R DS (ON ).
30 @ V G S = 4.
0V 46 @ V G S = 2.
5V
R ugged and reliable.
S urface Mount P ackage.
D1 D2
TS OP 6 Top View
S1 D1/D2 S2
1 2 3
6 5 4
G1 D1/D2 G2
G1 S1 G2 S2
ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous @ T J =25 C -P ulsed
b
S ymbol V DS V GS ID IDM IS PD T J , T S TG
Limit 20 10 4 25 2 1.
25 -55 to 150
Unit V V A A A W C
...