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PI6LC48P0401

Part Number	PI6LC48P0401
Manufacturer	Pericom Semiconductor
Description	4-Output LVPECL Networking Clock Generator
Published	May 13, 2016
Detailed Description	PI6LC48P0401 4-Output LVPECL Networking Clock Generator Features ÎÎFour differential LVPECL output pairs ÎÎSelectable c...
Datasheet	PI6LC48P0401 PDF File

Overview

PI6LC48P0401 4-Output LVPECL Networking Clock Generator Features ÎÎFour differential LVPECL output pairs ÎÎSelectable crystal oscillator interface or LVCMOS/LVTTL single-ended clock input ÎÎSupports the following output frequencies: 156.
25MHz, 125MHz, 62.
5MHz ÎÎRMS phase jitter @ 156.
25MHz, using a 25MHz crystal (1.
875MHz – 20MHz): 0.
23ps (typical) ÎÎRMS phase jitter @ 156.
25MHz, using a 25MHz crystal (12kHz – 20MHz): 0.
28ps (typical) ÎÎFull 3.
3V or 2.
5V supply modes ÎÎ-40°C to 85°C ambient operating temperature ÎÎAvailable in lead-free packages Applications ÎÎNetworking systems Block Diagram Description The PI6LC48P0401 is a 4-output LVPECL synthesizer optimized to generate Ethernet reference clock frequencies and is a member of Pericom’s HiFlex family of high performance clock solutions.
Using a 25MHz crystal, the following frequencies can be generated based on the settings of 2 frequency select pins (N_SEL[1:0]): 156.
25MHz, 125MHz, 62.
5MHz.
The PI6LC48P0401 uses Pericom’s proprietary low phase noise VCO technology and can achieve less than 1ps typical rms phase jitter, so it is ideal for Ethernet interface in all kind of systems.
N_SEL[1:0] PLL_Bypass XTAL_IN XTAL_OUT Ref_IN IN_SEL OSC M_reset 2 Phase Detector VCO M = 25 (fixed) N_SEL[1:0] 0 0 ÷4 0 1 ÷5 1 0 ÷10 1 1 not used CLK0 CLK0# CLK1 CLK1# CLK2 CLK2# CLK3 CLK3# 14-0203 1 www.
pericom.
com PI6LC48P0401 Rev.
D 11/7/2014 Pin Configuration CLK1# CLK1 VDDO CLK0 CLK0# M_reset PLL_Bypass NC VDDA N_SEL0 VDD N_SEL1 1 2 3 4 5 6 7 8 9 10 11 12 24 CLK2# 23 CLK2 22 VDDO 21 CLK3 20 CLK3# 19 GND 18 VDD 17 IN_SEL 16 Ref_IN 15 GND 14 XTAL_IN 13 XTAL_OUT PI6LC48P0401 4-Output LVPECL Networking Clock Generator Pinout Table Pin No.
1, 2 3, 22 4, 5 6 7 8 9 10, 12 11, 18 13, 14 15, 19 16 17 20, 21 23, 24 Pin Name CLK1#, CLK1 VDDO CLK0, CLK0# M_reset PLL_Bypass NC VDDA N_SEL0, N_SEL1 VDD XTAL_OUT, XTAL_IN GND Ref_IN IN_SEL CLK3#, CLK3 CLK2, CLK2# I/O Type Output Power Output Input Pulldown Input Pulldown...

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