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IS61QDB21M18A

ISSI
Part Number IS61QDB21M18A
Manufacturer ISSI
Description 18Mb QUAD (Burst 2) Synchronous SRAM
Published Jun 10, 2016
Detailed Description IS61QDB21M18A IS61QDB251236A 1Mx18, 512Kx36 18Mb QUAD (Burst 2) Synchronous SRAM NOVEMBER 2014 FEATURES  512Kx36 and...
Datasheet PDF File IS61QDB21M18A PDF File

IS61QDB21M18A
IS61QDB21M18A


Overview
IS61QDB21M18A IS61QDB251236A 1Mx18, 512Kx36 18Mb QUAD (Burst 2) Synchronous SRAM NOVEMBER 2014 FEATURES  512Kx36 and 1Mx18 configuration available.
 On-chip Delay-Locked Loop (DLL) for wide data valid window.
 Separate independent read and write ports with concurrent read and write operations.
 Synchronous pipeline read with EARLY write operation.
 Double Data Rate (DDR) interface for read and write input ports.
 Fixed 2-bit burst for read and write operations.
 Clock stop support.
 Two input clocks (K and K#) for address and control registering at rising edges only.
 Two output clocks (C and C#) for data output control.
 Two echo clocks (CQ and CQ#) that are delivered simultane...



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