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9DBL0853

Part Number	9DBL0853
Manufacturer	IDT
Description	8-output 3.3V LP-HCSL Zero-Delay Buffer
Published	Apr 5, 2019
Detailed Description	8-output 3.3V LP-HCSL Zero-Delay Buffer with LOS Indicator 9DBL08x3 Datasheet General Description The 9DBL08x3 devices...
Datasheet	9DBL0853 PDF File

Overview

8-output 3.
3V LP-HCSL Zero-Delay Buffer with LOS Indicator 9DBL08x3 Datasheet General Description The 9DBL08x3 devices are 3.
3V members of IDT's Full-Featured PCIe clock family.
They support PCIe Gen1-4 Common Clock (CC) architectures and also support NVLINK applications.
The 9DBL08x3 parts have a Loss of Signal (LOS) indicator to support fault-tolerant, high reliability systems.
Recommended Application PCIe Gen1-4 and NVLINK clock distribution for Riser Cards, Storage, Networking, JBOD, Communications, Access Points Output Features ▪ Loss Of Signal (LOS) open drain output ▪ 8 – 1-200 MHz Low-Power (LP) HCSL DIF pairs ▪ 9DBL0843 default Zout = 100Ω ▪ 9DBL0853 default Zout = 85Ω ▪ Easy AC-coupling to other logic families, see IDT application note AN-891.
Key Specifications ▪ PCIe Gen1-4 CC compliant in ZDB or fanout buffer mode ▪ Supports NVLINK at 156.
25M in ZDB or fanout buffer mode ▪ DIF cycle-to-cycle jitter <50ps ▪ DIF output-to-output skew < 50ps ▪ Bypa...

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