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SY100ELT21L

Part Number	SY100ELT21L
Manufacturer	Microchip
Description	3.3V Differential LVPECL-to-LVTTL Translator
Published	Aug 29, 2019
Detailed Description	SY100ELT21L 3.3V Differential LVPECL-to-LVTTL Translator Features • 3.3V Power Supply • 2.0 ns Typical Propagation Del...
Datasheet	SY100ELT21L PDF File

Overview

SY100ELT21L 3.
3V Differential LVPECL-to-LVTTL Translator Features • 3.
3V Power Supply • 2.
0 ns Typical Propagation Delay • Low Power • Differential LVPECL Inputs • 24 mA TTL Outputs • Flow-Through Pinouts • Available in 8-Lead SOIC Package General Description The SY100ELT21L is a single differential LVPECL-to-LVTTL translator that uses a single +3.
3V power supply.
Because LVPECL (low voltage positive ECL) levels are used, only +3.
3V and ground are required.
The small outline 8-lead SOIC package and low skew single gate design make the ELT21L ideal for applications that require the translation of a clock or data signal where minimal space, low power, and low cost are critical.
VBB allows a differential, single-ended, or AC-coupled interface to the device.
If used, the VBB output should be bypassed to VCC with a 0.
01 μF capacitor.
Under open input conditions, the /D will be biased at a VCC/2 voltage level and the D input will be pulled to ground.
This condition will force the Q output low to provide added stability.
The ELT21L is compatible with positive ECL 100K logic levels.
Package Type SY100ELT21L 8-Lead SOIC (Top View) NC 1 D2 PECL D3 VBB 4 8 VCC TTL 7 Q 6 NC 5 GND  2019 Microchip Technology Inc.
DS20006213A-page 1 SY100ELT21L 1.
0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † Power Supply Voltage (VCC) .
.
–0.
5V to +3.
8V PECL Input Voltage (VIN) 0V to VCC+0.
5V Voltage Applied to Output at High State (VOUT) .
–0.
5V to VCC Current Applied to Output at Low State (IOUT) .
.
Twice the Rated IOL in mA † Notice: Permanent device damage can occur if absolute maximum r...

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