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SY100ELT23

Microchip
Part Number SY100ELT23
Manufacturer Microchip
Description Dual Differential PECL-to-TTL Translator
Published Aug 29, 2019
Detailed Description SY100ELT23 Dual Differential PECL-to-TTL Translator Features • 3.0 ns Typical Propagation Delay • <300 ps Typical With...
Datasheet PDF File SY100ELT23 PDF File

SY100ELT23
SY100ELT23



Overview
SY100ELT23 Dual Differential PECL-to-TTL Translator Features • 3.
0 ns Typical Propagation Delay • <300 ps Typical Within-Device Skew • Differential PECL Inputs • 24 mA TTL Outputs • Flow-Through Pinouts • Internal Input 50 kΩ Pull-Down Resistors • Available in 8-Lead SOIC Package General Description The SY100ELT23 is a dual differential PECL-to-TTL translator.
Because PECL (positive ECL) levels are used, only +5V and ground are required.
The small outline 8-lead SOIC package and low skew, dual gate design make the ELT23 ideal for applications that require the translation of a clock or data signal.
The ELT23 is compatible with positive ECL 100K logic levels.
Package Type SY100ELT23 8-Lead SOIC (Top View) D0 1 8 VCC /D0 2 7 Q0 LVPECL LVTTL /D1 3 6 Q1 D1 4 5 GND  2019 Microchip Technology Inc.
DS20006235A-page 1 SY100ELT23 1.
0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † Power Supply Voltage (VCC) .
.
–0.
5V to +7.
0V PECL Input Voltage (VIN) 0V to VCC+0.
5V Voltage Applied to Output at High State (VOUT) .
.
.
–0.
5V to +5.
5V Current Applied to Output at Low State (IOUT) .
.
Twice the Rated IOL in mA † Notice: Permanent device damage can occur if absolute maximum ratings are exceeded.
This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
TTL DC ELECTRICAL CHARACTERISTICS Note 1 Electrical Characteristics: VCC = VCC (Min.
) to VCC (Max.
); Values valid from –40°C to +8...



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